initial commit

1 files changed, 464 insertions, 0 deletions

diff --git a/gschem/outputs.sch b/gschem/outputs.sch
new file mode 100644
index 0000000..2d953ce
--- /dev/null
+++ b/gschem/outputs.sch
@@ -0,0 +1,464 @@
+v 20110115 2
+C 44900 38500 0 0 0 title-A2.sym
+C 52600 42200 1 0 0 dual-opamp-1.sym
+{
+T 52800 44500 5 10 0 0 0 0 1
+device=DUAL_OPAMP
+T 53300 42300 5 10 1 1 0 0 1
+refdes=IC2
+T 52800 44100 5 10 0 0 0 0 1
+footprint=SO8
+T 52800 44700 5 10 0 0 0 0 1
+symversion=0.2
+T 52600 42200 5 10 0 0 0 0 1
+slot=2
+}
+C 52600 49800 1 0 0 dual-opamp-1.sym
+{
+T 52800 52100 5 10 0 0 0 0 1
+device=DUAL_OPAMP
+T 53300 49900 5 10 1 1 0 0 1
+refdes=IC2
+T 52800 51700 5 10 0 0 0 0 1
+footprint=SO8
+T 52800 52300 5 10 0 0 0 0 1
+symversion=0.2
+T 52600 49800 5 10 0 0 0 0 1
+slot=1
+}
+C 53300 50500 1 0 0 capacitor-1.sym
+{
+T 53500 51200 5 10 0 0 0 0 1
+device=CAPACITOR
+T 53500 51000 5 10 1 1 0 0 1
+refdes=C3
+T 53500 51400 5 10 0 0 0 0 1
+symversion=0.1
+T 53300 50500 5 10 1 1 0 0 1
+value=100n
+}
+C 52900 50800 1 0 0 vcc-2.sym
+C 52800 49000 1 0 0 vcc-minus-1.sym
+C 52200 49200 1 0 0 gnd-1.sym
+C 47000 50700 1 0 0 input-2.sym
+{
+T 47000 50900 5 10 1 0 0 0 1
+net=BLEND:2
+T 47600 51400 5 10 0 0 0 0 1
+device=none
+T 47500 50800 5 10 1 1 0 7 1
+value=BLEND B
+}
+C 47000 49900 1 0 0 input-2.sym
+{
+T 47000 50100 5 10 1 0 0 0 1
+net=BLEND:1
+T 47600 50600 5 10 0 0 0 0 1
+device=none
+T 47500 50000 5 10 1 1 0 7 1
+value=BLEND A
+}
+C 56400 49500 1 270 0 resistor-2.sym
+{
+T 56750 49100 5 10 0 0 270 0 1
+device=RESISTOR
+T 56700 49000 5 10 1 1 0 0 1
+refdes=R4
+T 56700 48800 5 10 1 1 0 0 1
+value=22k
+}
+N 56500 49700 56500 49500 4
+C 56900 47600 1 0 0 vcc-minus-1.sym
+C 56200 47600 1 0 0 vcc-minus-1.sym
+N 56500 48200 56500 48600 4
+C 57000 50300 1 180 0 resistor-variable-2.sym
+{
+T 56650 50800 5 10 1 1 180 0 1
+refdes=R3
+T 56200 49400 5 10 0 1 180 0 1
+device=VARIABLE_RESISTOR
+T 56300 50400 5 10 1 1 0 0 1
+value=100k?
+}
+N 57000 50200 57200 50200 4
+N 57200 50200 57200 48200 4
+N 56500 49600 59100 49600 4
+C 54900 50000 1 0 0 capacitor-4.sym
+{
+T 55100 51100 5 10 0 0 0 0 1
+device=POLARIZED_CAPACITOR
+T 55100 50500 5 10 1 1 0 0 1
+refdes=C4
+T 55100 50700 5 10 0 0 0 0 1
+symversion=0.1
+T 54900 50000 5 10 1 1 0 0 1
+value=1u
+}
+T 56700 48500 9 10 1 0 0 0 1
+taper resistor
+C 48800 50600 1 0 0 capacitor-4.sym
+{
+T 49000 51700 5 10 0 0 0 0 1
+device=POLARIZED_CAPACITOR
+T 49000 51100 5 10 1 1 0 0 1
+refdes=C1
+T 49000 51300 5 10 0 0 0 0 1
+symversion=0.1
+T 48800 50600 5 10 1 1 0 0 1
+value=1u
+}
+N 48800 50800 48400 50800 4
+C 48800 49800 1 0 0 capacitor-4.sym
+{
+T 49000 50900 5 10 0 0 0 0 1
+device=POLARIZED_CAPACITOR
+T 49000 50300 5 10 1 1 0 0 1
+refdes=C2
+T 49000 50500 5 10 0 0 0 0 1
+symversion=0.1
+T 48800 49800 5 10 1 1 0 0 1
+value=1u
+}
+N 48800 50000 48400 50000 4
+N 53100 50600 53100 50800 4
+N 53100 50700 53300 50700 4
+N 53100 49600 53100 49800 4
+N 52600 50000 52300 50000 4
+N 52300 50000 52300 49500 4
+C 52800 41400 1 0 0 vcc-minus-1.sym
+C 52900 43200 1 0 0 vcc-2.sym
+N 53100 43200 53100 43000 4
+N 53100 42000 53100 42200 4
+C 52200 41600 1 0 0 gnd-1.sym
+N 52300 42400 52300 41900 4
+N 52600 42400 52300 42400 4
+N 53100 49700 54600 49700 4
+N 54600 49700 54600 50700 4
+N 54600 50700 54200 50700 4
+C 51000 50900 1 180 0 resistor-2.sym
+{
+T 50600 50550 5 10 0 0 180 0 1
+device=RESISTOR
+T 50700 51100 5 10 1 1 180 0 1
+refdes=R1
+T 50900 50900 5 10 1 1 0 0 1
+value=100k
+}
+C 51000 50100 1 180 0 resistor-2.sym
+{
+T 50600 49750 5 10 0 0 180 0 1
+device=RESISTOR
+T 50700 49800 5 10 1 1 180 0 1
+refdes=R2
+T 50900 50100 5 10 1 1 0 0 1
+value=100k
+}
+N 50100 50800 49700 50800 4
+N 50100 50000 49700 50000 4
+N 51000 50800 51600 50800 4
+N 51600 50000 51600 50800 4
+N 51600 50000 51000 50000 4
+N 51600 50400 52600 50400 4
+C 53800 51900 1 180 0 resistor-2.sym
+{
+T 53400 51550 5 10 0 0 180 0 1
+device=RESISTOR
+T 53500 52100 5 10 1 1 180 0 1
+refdes=R5
+T 53700 51900 5 10 1 1 0 0 1
+value=100k
+}
+N 52900 51800 52300 51800 4
+N 52300 51800 52300 50400 4
+N 53800 51800 54300 51800 4
+N 54300 51800 54300 50200 4
+N 53600 50200 54900 50200 4
+T 53600 52200 9 10 1 0 0 0 1
+lower to ~2k?
+N 49900 43200 49900 50000 4
+N 49900 43200 50100 43200 4
+C 51000 43300 1 180 0 resistor-2.sym
+{
+T 50600 42950 5 10 0 0 180 0 1
+device=RESISTOR
+T 50700 43000 5 10 1 1 180 0 1
+refdes=R6
+T 50900 43300 5 10 1 1 0 0 1
+value=100k
+}
+N 51600 42800 52600 42800 4
+C 53800 44100 1 180 0 resistor-2.sym
+{
+T 53400 43750 5 10 0 0 180 0 1
+device=RESISTOR
+T 53500 44300 5 10 1 1 180 0 1
+refdes=R8
+T 53700 44100 5 10 1 1 0 0 1
+value=100k
+}
+N 52300 42800 52300 44000 4
+N 52300 44000 52900 44000 4
+N 53800 44000 54300 44000 4
+N 54300 44000 54300 42600 4
+N 53600 42600 54700 42600 4
+C 58100 42700 1 180 0 input-2.sym
+{
+T 58100 42500 5 10 1 0 180 0 1
+net=OUT:A:1
+T 57500 42000 5 10 0 0 180 0 1
+device=none
+T 57600 42600 5 10 1 1 180 7 1
+value=A/Mono Output
+}
+C 51600 53100 1 180 0 input-2.sym
+{
+T 51600 52900 5 10 1 0 180 0 1
+net=OUT:B:1
+T 51000 52400 5 10 0 0 180 0 1
+device=none
+T 51100 53000 5 10 1 1 180 7 1
+value=B Output
+}
+N 49900 50800 49900 53000 4
+N 49900 53000 50200 53000 4
+T 50200 53400 9 10 1 0 0 0 2
+BLEND:2 is an opamp output.
+Needs 100k to ground?
+C 51000 42500 1 180 0 resistor-2.sym
+{
+T 50600 42150 5 10 0 0 180 0 1
+device=RESISTOR
+T 50700 42200 5 10 1 1 180 0 1
+refdes=R7
+T 50900 42500 5 10 1 1 0 0 1
+value=100k
+}
+N 51600 42400 51600 43200 4
+N 51000 43200 51600 43200 4
+N 51000 42400 51600 42400 4
+N 48900 42400 50100 42400 4
+C 47500 42300 1 0 0 input-2.sym
+{
+T 47500 42500 5 10 1 0 0 0 1
+net=JACKSWITCH:B:1
+T 48100 43000 5 10 0 0 0 0 1
+device=none
+T 48000 42400 5 10 1 1 0 7 1
+value=from B Jack switch
+}
+C 60300 49400 1 0 0 dual-opamp-1.sym
+{
+T 60500 51700 5 10 0 0 0 0 1
+device=DUAL_OPAMP
+T 61000 49500 5 10 1 1 0 0 1
+refdes=IC2
+T 60500 51300 5 10 0 0 0 0 1
+footprint=SO8
+T 60500 51900 5 10 0 0 0 0 1
+symversion=0.2
+T 60300 49400 5 10 0 0 0 0 1
+slot=1
+}
+C 60300 45300 1 0 0 dual-opamp-1.sym
+{
+T 60500 47600 5 10 0 0 0 0 1
+device=DUAL_OPAMP
+T 61000 45400 5 10 1 1 0 0 1
+refdes=IC2
+T 60500 47200 5 10 0 0 0 0 1
+footprint=SO8
+T 60500 47800 5 10 0 0 0 0 1
+symversion=0.2
+T 60300 45300 5 10 0 0 0 0 1
+slot=2
+}
+C 63000 49600 1 0 0 capacitor-1.sym
+{
+T 63200 50300 5 10 0 0 0 0 1
+device=CAPACITOR
+T 63400 50100 5 10 1 1 0 0 1
+refdes=C7
+T 63200 50500 5 10 0 0 0 0 1
+symversion=0.1
+T 63300 49400 5 10 1 1 0 0 1
+value=22u
+}
+N 63000 49800 61300 49800 4
+C 65100 49900 1 180 0 resistor-2.sym
+{
+T 64700 49550 5 10 0 0 180 0 1
+device=RESISTOR
+T 64800 50100 5 10 1 1 180 0 1
+refdes=R12
+T 64500 49500 5 10 1 1 0 0 1
+value=100
+}
+N 64200 49800 63900 49800 4
+C 65100 45800 1 180 0 resistor-2.sym
+{
+T 64700 45450 5 10 0 0 180 0 1
+device=RESISTOR
+T 64800 46000 5 10 1 1 180 0 1
+refdes=R13
+T 64500 45400 5 10 1 1 0 0 1
+value=100
+}
+N 64200 45700 63900 45700 4
+C 63000 45500 1 0 0 capacitor-1.sym
+{
+T 63400 46000 5 10 1 1 0 0 1
+refdes=C8
+T 63300 45300 5 10 1 1 0 0 1
+value=22u
+T 63200 46200 5 10 0 0 0 0 1
+device=CAPACITOR
+T 63200 46400 5 10 0 0 0 0 1
+symversion=0.1
+}
+N 63000 45700 61300 45700 4
+C 66600 49900 1 180 0 input-2.sym
+{
+T 66600 49700 5 10 1 0 180 0 1
+net=OUT:XLR:1
+T 66000 49200 5 10 0 0 180 0 1
+device=none
+T 66100 49800 5 10 1 1 180 7 1
+value=XLR out
+}
+C 66600 45800 1 180 0 input-2.sym
+{
+T 66600 45600 5 10 1 0 180 0 1
+net=OUT:XLR:2
+T 66000 45100 5 10 0 0 180 0 1
+device=none
+T 66100 45700 5 10 1 1 180 7 1
+value=XLR out
+}
+N 65200 45700 65100 45700 4
+N 65200 49800 65100 49800 4
+C 60000 49700 1 180 0 resistor-2.sym
+{
+T 59600 49350 5 10 0 0 180 0 1
+device=RESISTOR
+T 59700 49900 5 10 1 1 180 0 1
+refdes=R9
+T 59400 49300 5 10 1 1 0 0 1
+value=2k2
+}
+N 60300 49600 60000 49600 4
+N 60300 50000 60000 50000 4
+N 60000 50000 60000 51400 4
+N 60000 51400 62300 51400 4
+N 62300 51400 62300 49800 4
+C 60600 50600 1 0 0 vcc-2.sym
+C 60600 46300 1 0 0 vcc-2.sym
+C 60500 44500 1 0 0 vcc-minus-1.sym
+C 60500 48600 1 0 0 vcc-minus-1.sym
+N 60800 46100 60800 46300 4
+C 61000 50200 1 0 0 capacitor-1.sym
+{
+T 61200 50900 5 10 0 0 0 0 1
+device=CAPACITOR
+T 61200 50700 5 10 1 1 0 0 1
+refdes=C5
+T 61200 51100 5 10 0 0 0 0 1
+symversion=0.1
+T 61000 50200 5 10 1 1 0 0 1
+value=100n
+}
+N 60800 50600 60800 50200 4
+N 60800 50400 61000 50400 4
+N 60800 49200 60800 49400 4
+N 60800 49300 62100 49300 4
+N 62100 49300 62100 50400 4
+N 62100 50400 61900 50400 4
+N 60800 45100 60800 45300 4
+C 61200 47400 1 180 0 resistor-2.sym
+{
+T 60800 47050 5 10 0 0 180 0 1
+device=RESISTOR
+T 60900 47600 5 10 1 1 180 0 1
+refdes=R11
+T 60600 47000 5 10 1 1 0 0 1
+value=100k
+}
+C 59900 44700 1 0 0 gnd-1.sym
+N 60300 45500 60000 45500 4
+N 60000 45500 60000 45000 4
+N 60300 47300 60000 47300 4
+N 60000 45900 60000 48000 4
+N 60000 45900 60300 45900 4
+N 61200 47300 61600 47300 4
+N 61600 47300 61600 45700 4
+C 61200 48100 1 180 0 resistor-2.sym
+{
+T 60800 47750 5 10 0 0 180 0 1
+device=RESISTOR
+T 60900 48300 5 10 1 1 180 0 1
+refdes=R10
+T 60600 47700 5 10 1 1 0 0 1
+value=100k
+}
+N 62300 49800 62300 48000 4
+N 62300 48000 61200 48000 4
+N 60300 48000 60000 48000 4
+C 62700 46000 1 90 0 zener-2.sym
+{
+T 62200 46400 5 10 0 0 90 0 1
+device=ZENER_DIODE
+T 62400 46300 5 10 1 1 90 0 1
+refdes=Z2
+}
+C 62800 50100 1 90 0 zener-2.sym
+{
+T 62300 50500 5 10 0 0 90 0 1
+device=ZENER_DIODE
+T 62500 50400 5 10 1 1 90 0 1
+refdes=Z1
+}
+N 62600 46000 62600 45700 4
+N 62700 50100 62700 49800 4
+C 62500 51200 1 0 0 vcc-2.sym
+N 62700 51200 62700 50900 4
+C 62400 47100 1 0 0 vcc-2.sym
+N 62600 47100 62600 46800 4
+T 58800 52400 9 10 1 0 0 0 1
+DI box
+B 58800 44200 8400 8000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+C 54700 42400 1 0 0 capacitor-4.sym
+{
+T 54900 43500 5 10 0 0 0 0 1
+device=POLARIZED_CAPACITOR
+T 54900 42900 5 10 1 1 0 0 1
+refdes=C6
+T 54900 43100 5 10 0 0 0 0 1
+symversion=0.1
+T 54700 42400 5 10 1 1 0 0 1
+value=1u
+}
+C 55800 42300 1 270 0 resistor-2.sym
+{
+T 56150 41900 5 10 0 0 270 0 1
+device=RESISTOR
+T 56100 41800 5 10 1 1 0 0 1
+refdes=R4
+T 56100 41600 5 10 1 1 0 0 1
+value=100k
+}
+C 55600 40600 1 0 0 vcc-minus-1.sym
+N 55600 42600 56700 42600 4
+N 55900 42600 55900 42300 4
+N 55900 41400 55900 41200 4
+T 47400 41900 9 10 1 0 0 0 1
+doesn't this need a pulldown?
+T 47400 39700 9 10 1 0 0 0 9
+When there's no cable connected to output B,
+the signal on JACKSWITCH:B:1 is the same as
+the signal on OUT:B:1. The circuit will mix A
+and B to one mono signal.
+
+When a cable is connected, i.e. when stereo
+output is requested, there is no signal on
+JACKSWITCH:B:1. The total output of the opamp
+will be BLEND:1 (A).
+N 55800 50200 56100 50200 4