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authorrekado <rekado@elephly.net>2014-09-20 08:54:44 +0200
committerrekado <rekado@elephly.net>2014-09-20 08:54:44 +0200
commit8f2247648dc9a4fcbcf59d2704dfbaf89296438b (patch)
tree4a72253069179c707c142fd8eebef4e1e089d81d
parentd780cef1cf8a5533c10f0bb388f783e0c9727734 (diff)
print addresses of registers as names
Diffstat
-rw-r--r--SHARC/Types.hs637
1 files changed, 635 insertions, 2 deletions
diff --git a/SHARC/Types.hs b/SHARC/Types.hs
index ba95413..7d83eb5 100644
--- a/SHARC/Types.hs
+++ b/SHARC/Types.hs
@@ -222,18 +222,651 @@ instance Show Dreg where
-- TODO: according to the docs this is R15-R0 *and* F15-F0
-- TODO: if this is a CDREG, it should be S, not R
+
+-- I/O processor register address memory map
+registerMemoryMap = fromList [ (0x30020,"EEMUIN")
+ , (0x30021,"EEMUSTAT")
+ , (0x30022,"EEMUOUT")
+ , (0x30023,"OSPID")
+ , (0x30024,"SYSCTL")
+ , (0x30025,"BRKCTL")
+ , (0x30026,"REVPID")
+ , (0x300a0,"PSA1S")
+ , (0x300a1,"PSA1E")
+ , (0x300a2,"PSA2S")
+ , (0x300a3,"PSA2E")
+ , (0x300a4,"PSA3S")
+ , (0x300a5,"PSA3E")
+ , (0x300a6,"PSA4S")
+ , (0x300a7,"PSA4E")
+ , (0x300b2,"DMA1S")
+ , (0x300b3,"DMA1E")
+ , (0x300b4,"DMA2S")
+ , (0x300b5,"DMA2E")
+ , (0x300b6,"D1IC")
+ , (0x300b7,"D1ID")
+ , (0x300b8,"PMDAS")
+ , (0x300b9,"PMDAE")
+ , (0x300bc,"D2IC")
+ , (0x300bd,"D2ID")
+ , (0x300ae,"EMUN")
+ , (0x1800,"SDCTL")
+ , (0x1801,"EPCTL")
+ , (0x1802,"SDRRC")
+ , (0x1803,"SDSTAT")
+ , (0x180d,"BMAX")
+ , (0x180e,"BCNT")
+ , (0x180f,"SYSTAT")
+ , (0x1804,"AMICTL0")
+ , (0x1805,"AMICTL1")
+ , (0x1806,"AMICTL2")
+ , (0x1807,"AMICTL3")
+ , (0x180a,"AMISTAT")
+ , (0x180b,"DMAC0")
+ , (0x180c,"DMAC1")
+ , (0x1820,"EIEP0")
+ , (0x1821,"EMEP0")
+ , (0x1822,"ECEP0")
+ , (0x1823,"IIEP0")
+ , (0x1824,"IMEP0")
+ , (0x1825,"ICEP0")
+ , (0x1825,"CEP0")
+ , (0x1826,"CPEP0")
+ , (0x1827,"EBEP0")
+ , (0x1828,"TPEP0")
+ , (0x1829,"ELEP0")
+ , (0x182c,"DFEP0")
+ , (0x182d,"TFEP0")
+ , (0x1830,"EIEP1")
+ , (0x1831,"EMEP1")
+ , (0x1832,"ECEP1")
+ , (0x1833,"IIEP1")
+ , (0x1834,"IMEP1")
+ , (0x1835,"ICEP1")
+ , (0x1835,"CEP1")
+ , (0x1836,"CPEP1")
+ , (0x1837,"EBEP1")
+ , (0x1838,"TPEP1")
+ , (0x1839,"ELEP1")
+ , (0x183c,"DFEP1")
+ , (0x183d,"TFEP1")
+ , (0x2300,"SPERRSTAT")
+ , (0xc00,"SPCTL0")
+ , (0xc01,"SPCTL1")
+ , (0xc02,"DIV0")
+ , (0xc03,"DIV1")
+ , (0xc04,"SPMCTL0")
+ , (0xc05,"MT0CS0")
+ , (0xc06,"MT0CS1")
+ , (0xc07,"MT0CS2")
+ , (0xc08,"MT0CS3")
+ , (0xc09,"MR1CS0")
+ , (0xc0A,"MR1CS1")
+ , (0xc0B,"MR1CS2")
+ , (0xc0C,"MR1CS3")
+ , (0xc0D,"MT0CCS0")
+ , (0xc0E,"MT0CCS1")
+ , (0xc0F,"MT0CCS2")
+ , (0xc10,"MT0CCS3")
+ , (0xc11,"MR1CCS0")
+ , (0xc12,"MR1CCS1")
+ , (0xc13,"MR1CCS2")
+ , (0xc14,"MR1CCS3")
+ , (0xc15,"SPCNT0")
+ , (0xc16,"SPCNT1")
+ , (0xc17,"SPMCTL1")
+ , (0xc18,"SPERRCTL0")
+ , (0xc19,"SPERRCTL1")
+ , (0xc05,"SP0CS0")
+ , (0xc06,"SP0CS1")
+ , (0xc07,"SP0CS2")
+ , (0xc08,"SP0CS3")
+ , (0xc09,"SP1CS0")
+ , (0xc0A,"SP1CS1")
+ , (0xc0B,"SP1CS2")
+ , (0xc0C,"SP1CS3")
+ , (0xc0D,"SP0CCS0")
+ , (0xc0E,"SP0CCS1")
+ , (0xc0F,"SP0CCS2")
+ , (0xc10,"SP0CCS3")
+ , (0xc11,"SP1CCS0")
+ , (0xc12,"SP1CCS1")
+ , (0xc13,"SP1CCS2")
+ , (0xc14,"SP1CCS3")
+ , (0xc40,"IISP0A")
+ , (0xc41,"IMSP0A")
+ , (0xc42,"CSP0A")
+ , (0xc43,"CPSP0A")
+ , (0xc44,"IISP0B")
+ , (0xc45,"IMSP0B")
+ , (0xc46,"CSP0B")
+ , (0xc47,"CPSP0B")
+ , (0xc48,"IISP1A")
+ , (0xc49,"IMSP1A")
+ , (0xc4A,"CSP1A")
+ , (0xc4B,"CPSP1A")
+ , (0xc4C,"IISP1B")
+ , (0xc4D,"IMSP1B")
+ , (0xc4E,"CSP1B")
+ , (0xc4F,"CPSP1B")
+ , (0xc60,"TXSP0A")
+ , (0xc61,"RXSP0A")
+ , (0xc62,"TXSP0B")
+ , (0xc63,"RXSP0B")
+ , (0xc64,"TXSP1A")
+ , (0xc65,"RXSP1A")
+ , (0xc66,"TXSP1B")
+ , (0xc67,"RXSP1B")
+ , (0x400,"SPCTL2")
+ , (0x401,"SPCTL3")
+ , (0x402,"DIV2")
+ , (0x403,"DIV3")
+ , (0x404,"SPMCTL2")
+ , (0x405,"MT2CS0")
+ , (0x406,"MT2CS1")
+ , (0x407,"MT2CS2")
+ , (0x408,"MT2CS3")
+ , (0x409,"MR3CS0")
+ , (0x40A,"MR3CS1")
+ , (0x40B,"MR3CS2")
+ , (0x40C,"MR3CS3")
+ , (0x40D,"MT2CCS0")
+ , (0x40E,"MT2CCS1")
+ , (0x40F,"MT2CCS2")
+ , (0x410,"MT2CCS3")
+ , (0x411,"MR3CCS0")
+ , (0x412,"MR3CCS1")
+ , (0x413,"MR3CCS2")
+ , (0x414,"MR3CCS3")
+ , (0x415,"SPCNT2")
+ , (0x416,"SPCNT3")
+ , (0x417,"SPMCTL3")
+ , (0x418,"SPERRCTL2")
+ , (0x419,"SPERRCTL3")
+ , (0x405,"SP2CS0")
+ , (0x406,"SP2CS1")
+ , (0x407,"SP2CS2")
+ , (0x408,"SP2CS3")
+ , (0x409,"SP3CS0")
+ , (0x40A,"SP3CS1")
+ , (0x40B,"SP3CS2")
+ , (0x40C,"SP3CS3")
+ , (0x40D,"SP2CCS0")
+ , (0x40E,"SP2CCS1")
+ , (0x40F,"SP2CCS2")
+ , (0x410,"SP2CCS3")
+ , (0x411,"SP3CCS0")
+ , (0x412,"SP3CCS1")
+ , (0x413,"SP3CCS2")
+ , (0x414,"SP3CCS3")
+ , (0x440,"IISP2A")
+ , (0x441,"IMSP2A")
+ , (0x442,"CSP2A")
+ , (0x443,"CPSP2A")
+ , (0x444,"IISP2B")
+ , (0x445,"IMSP2B")
+ , (0x446,"CSP2B")
+ , (0x447,"CPSP2B")
+ , (0x448,"IISP3A")
+ , (0x449,"IMSP3A")
+ , (0x44A,"CSP3A")
+ , (0x44B,"CPSP3A")
+ , (0x44C,"IISP3B")
+ , (0x44D,"IMSP3B")
+ , (0x44E,"CSP3B")
+ , (0x44F,"CPSP3B")
+ , (0x460,"TXSP2A")
+ , (0x461,"RXSP2A")
+ , (0x462,"TXSP2B")
+ , (0x463,"RXSP2B")
+ , (0x464,"TXSP3A")
+ , (0x465,"RXSP3A")
+ , (0x466,"TXSP3B")
+ , (0x467,"RXSP3B")
+ , (0x800,"SPCTL4")
+ , (0x801,"SPCTL5")
+ , (0x802,"DIV4")
+ , (0x803,"DIV5")
+ , (0x804,"SPMCTL4")
+ , (0x805,"MT4CS0")
+ , (0x806,"MT4CS1")
+ , (0x807,"MT4CS2")
+ , (0x808,"MT4CS3")
+ , (0x809,"MR5CS0")
+ , (0x80A,"MR5CS1")
+ , (0x80B,"MR5CS2")
+ , (0x80C,"MR5CS3")
+ , (0x80D,"MT4CCS0")
+ , (0x80E,"MT4CCS1")
+ , (0x80F,"MT4CCS2")
+ , (0x810,"MT4CCS3")
+ , (0x811,"MR5CCS0")
+ , (0x812,"MR5CCS1")
+ , (0x813,"MR5CCS2")
+ , (0x814,"MR5CCS3")
+ , (0x815,"SPCNT4")
+ , (0x816,"SPCNT5")
+ , (0x817,"SPMCTL5")
+ , (0x818,"SPERRCTL4")
+ , (0x819,"SPERRCTL5")
+ , (0x805,"SP4CS0")
+ , (0x806,"SP4CS1")
+ , (0x807,"SP4CS2")
+ , (0x808,"SP4CS3")
+ , (0x809,"SP5CS0")
+ , (0x80A,"SP5CS1")
+ , (0x80B,"SP5CS2")
+ , (0x80C,"SP5CS3")
+ , (0x80D,"SP4CCS0")
+ , (0x80E,"SP4CCS1")
+ , (0x80F,"SP4CCS2")
+ , (0x810,"SP4CCS3")
+ , (0x811,"SP5CCS0")
+ , (0x812,"SP5CCS1")
+ , (0x813,"SP5CCS2")
+ , (0x814,"SP5CCS3")
+ , (0x840,"IISP4A")
+ , (0x841,"IMSP4A")
+ , (0x842,"CSP4A")
+ , (0x843,"CPSP4A")
+ , (0x844,"IISP4B")
+ , (0x845,"IMSP4B")
+ , (0x846,"CSP4B")
+ , (0x847,"CPSP4B")
+ , (0x848,"IISP5A")
+ , (0x849,"IMSP5A")
+ , (0x84A,"CSP5A")
+ , (0x84B,"CPSP5A")
+ , (0x84C,"IISP5B")
+ , (0x84D,"IMSP5B")
+ , (0x84E,"CSP5B")
+ , (0x84F,"CPSP5B")
+ , (0x860,"TXSP4A")
+ , (0x861,"RXSP4A")
+ , (0x862,"TXSP4B")
+ , (0x863,"RXSP4B")
+ , (0x864,"TXSP5A")
+ , (0x865,"RXSP5A")
+ , (0x866,"TXSP5B")
+ , (0x867,"RXSP5B")
+ , (0x4800,"SPCTL6")
+ , (0x4801,"SPCTL7")
+ , (0x4802,"DIV6")
+ , (0x4803,"DIV7")
+ , (0x4804,"SPMCTL6")
+ , (0x4805,"MT6CS0")
+ , (0x4806,"MT6CS1")
+ , (0x4807,"MT6CS2")
+ , (0x4808,"MT6CS3")
+ , (0x4809,"MR7CS0")
+ , (0x480A,"MR7CS1")
+ , (0x480B,"MR7CS2")
+ , (0x480C,"MR7CS3")
+ , (0x480D,"MT6CCS0")
+ , (0x480E,"MT6CCS1")
+ , (0x480F,"MT6CCS2")
+ , (0x4810,"MT6CCS3")
+ , (0x4811,"MR7CCS0")
+ , (0x4812,"MR7CCS1")
+ , (0x4813,"MR7CCS2")
+ , (0x4814,"MR7CCS3")
+ , (0x4815,"SPCNT6")
+ , (0x4816,"SPCNT7")
+ , (0x4817,"SPMCTL7")
+ , (0x4818,"SPERRCTL6")
+ , (0x4819,"SPERRCTL7")
+ , (0x4805,"SP6CS0")
+ , (0x4806,"SP6CS1")
+ , (0x4807,"SP6CS2")
+ , (0x4808,"SP6CS3")
+ , (0x4809,"SP7CS0")
+ , (0x480A,"SP7CS1")
+ , (0x480B,"SP7CS2")
+ , (0x480C,"SP7CS3")
+ , (0x480D,"SP6CCS0")
+ , (0x480E,"SP6CCS1")
+ , (0x480F,"SP6CCS2")
+ , (0x4810,"SP6CCS3")
+ , (0x4811,"SP7CCS0")
+ , (0x4812,"SP7CCS1")
+ , (0x4813,"SP7CCS2")
+ , (0x4814,"SP7CCS3")
+ , (0x4840,"IISP6A")
+ , (0x4841,"IMSP6A")
+ , (0x4842,"CSP6A")
+ , (0x4843,"CPSP6A")
+ , (0x4844,"IISP6B")
+ , (0x4845,"IMSP6B")
+ , (0x4846,"CSP6B")
+ , (0x4847,"CPSP6B")
+ , (0x4848,"IISP7A")
+ , (0x4849,"IMSP7A")
+ , (0x484A,"CSP7A")
+ , (0x484B,"CPSP7A")
+ , (0x484C,"IISP7B")
+ , (0x484D,"IMSP7B")
+ , (0x484E,"CSP7B")
+ , (0x484F,"CPSP7B")
+ , (0x4860,"TXSP6A")
+ , (0x4861,"RXSP6A")
+ , (0x4862,"TXSP6B")
+ , (0x4863,"RXSP6B")
+ , (0x4864,"TXSP7A")
+ , (0x4865,"RXSP7A")
+ , (0x4866,"TXSP7B")
+ , (0x4867,"RXSP7B")
+ , (0x1000,"SPICTL")
+ , (0x1001,"SPIFLG")
+ , (0x1002,"SPISTAT")
+ , (0x1003,"TXSPI")
+ , (0x1004,"RXSPI")
+ , (0x1005,"SPIBAUD")
+ , (0x1006,"RXSPI_SHADOW")
+ , (0x1080,"IISPI")
+ , (0x1081,"IMSPI")
+ , (0x1082,"CSPI")
+ , (0x1083,"CPSPI")
+ , (0x1084,"SPIDMAC")
+ , (0x2800,"SPICTLB")
+ , (0x2801,"SPIFLGB")
+ , (0x2802,"SPISTATB")
+ , (0x2803,"TXSPIB")
+ , (0x2804,"RXSPIB")
+ , (0x2805,"SPIBAUDB")
+ , (0x2806,"RXSPIB_SHADOW")
+ , (0x2880,"IISPIB")
+ , (0x2881,"IMSPIB")
+ , (0x2882,"CSPIB")
+ , (0x2883,"CPSPIB")
+ , (0x2884,"SPIDMACB")
+ , (0x1400,"TMSTAT")
+ , (0x1400,"TM0STAT")
+ , (0x1401,"TM0CTL")
+ , (0x1402,"TM0CNT")
+ , (0x1403,"TM0PRD")
+ , (0x1404,"TM0W")
+ , (0x1408,"TM1STAT")
+ , (0x1409,"TM1CTL")
+ , (0x140a,"TM1CNT")
+ , (0x140b,"TM1PRD")
+ , (0x140c,"TM1W")
+ , (0x1410,"TM2STAT")
+ , (0x1411,"TM2CTL")
+ , (0x1412,"TM2CNT")
+ , (0x1413,"TM2PRD")
+ , (0x1414,"TM2W")
+ , (0x2000,"PMCTL")
+ , (0x20FF,"ROMID")
+ , (0x2400,"IDP_DMA_I0")
+ , (0x2401,"IDP_DMA_I1")
+ , (0x2402,"IDP_DMA_I2")
+ , (0x2403,"IDP_DMA_I3")
+ , (0x2404,"IDP_DMA_I4")
+ , (0x2405,"IDP_DMA_I5")
+ , (0x2406,"IDP_DMA_I6")
+ , (0x2407,"IDP_DMA_I7")
+ , (0x2408,"IDP_DMA_I0A")
+ , (0x2409,"IDP_DMA_I1A")
+ , (0x240a,"IDP_DMA_I2A")
+ , (0x240b,"IDP_DMA_I3A")
+ , (0x240c,"IDP_DMA_I4A")
+ , (0x240d,"IDP_DMA_I5A")
+ , (0x240e,"IDP_DMA_I6A")
+ , (0x240f,"IDP_DMA_I7A")
+ , (0x2418,"IDP_DMA_I0B")
+ , (0x2419,"IDP_DMA_I1B")
+ , (0x241a,"IDP_DMA_I2B")
+ , (0x241b,"IDP_DMA_I3B")
+ , (0x241c,"IDP_DMA_I4B")
+ , (0x241d,"IDP_DMA_I5B")
+ , (0x241e,"IDP_DMA_I6B")
+ , (0x241f,"IDP_DMA_I7B")
+ , (0x2410,"IDP_DMA_M0")
+ , (0x2411,"IDP_DMA_M1")
+ , (0x2412,"IDP_DMA_M2")
+ , (0x2413,"IDP_DMA_M3")
+ , (0x2414,"IDP_DMA_M4")
+ , (0x2415,"IDP_DMA_M5")
+ , (0x2416,"IDP_DMA_M6")
+ , (0x2417,"IDP_DMA_M7")
+ , (0x2420,"IDP_DMA_C0")
+ , (0x2421,"IDP_DMA_C1")
+ , (0x2422,"IDP_DMA_C2")
+ , (0x2423,"IDP_DMA_C3")
+ , (0x2424,"IDP_DMA_C4")
+ , (0x2425,"IDP_DMA_C5")
+ , (0x2426,"IDP_DMA_C6")
+ , (0x2427,"IDP_DMA_C7")
+ , (0x2428,"IDP_DMA_PC0")
+ , (0x2429,"IDP_DMA_PC1")
+ , (0x242a,"IDP_DMA_PC2")
+ , (0x242b,"IDP_DMA_PC3")
+ , (0x242c,"IDP_DMA_PC4")
+ , (0x242d,"IDP_DMA_PC5")
+ , (0x242e,"IDP_DMA_PC6")
+ , (0x242f,"IDP_DMA_PC7")
+ , (0x2430,"SRU_CLK0")
+ , (0x2431,"SRU_CLK1")
+ , (0x2432,"SRU_CLK2")
+ , (0x2433,"SRU_CLK3")
+ , (0x2434,"SRU_CLK4")
+ , (0x2435,"SRU_CLK5")
+ , (0x2440,"SRU_DAT0")
+ , (0x2441,"SRU_DAT1")
+ , (0x2442,"SRU_DAT2")
+ , (0x2443,"SRU_DAT3")
+ , (0x2444,"SRU_DAT4")
+ , (0x2445,"SRU_DAT5")
+ , (0x2446,"SRU_DAT6")
+ , (0x2450,"SRU_FS0")
+ , (0x2451,"SRU_FS1")
+ , (0x2452,"SRU_FS2")
+ , (0x2453,"SRU_FS3")
+ , (0x2454,"SRU_FS4")
+ , (0x2460,"SRU_PIN0")
+ , (0x2461,"SRU_PIN1")
+ , (0x2462,"SRU_PIN2")
+ , (0x2463,"SRU_PIN3")
+ , (0x2464,"SRU_PIN4")
+ , (0x2470,"SRU_EXT_MISCA")
+ , (0x2471,"SRU_EXT_MISCB")
+ , (0x2478,"SRU_PBEN0")
+ , (0x2479,"SRU_PBEN1")
+ , (0x247A,"SRU_PBEN2")
+ , (0x247B,"SRU_PBEN3")
+ , (0x247D,"DAI_PIN_PULLUP")
+ , (0x2480,"DAI_IRPTL_FE")
+ , (0x2480,"DAI_IMASK_FE")
+ , (0x2481,"DAI_IRPTL_RE")
+ , (0x2481,"DAI_IMASK_RE")
+ , (0x2484,"DAI_IRPTL_PRI")
+ , (0x2488,"DAI_IRPTL_H")
+ , (0x2489,"DAI_IRPTL_L")
+ , (0x248C,"DAI_IRPTL_HS")
+ , (0x248D,"DAI_IRPTL_LS")
+ , (0x24B0,"IDP_CTL")
+ , (0x24B0,"IDP_CTL0")
+ , (0x24B1,"IDP_PP_CTL")
+ , (0x24B2,"IDP_CTL1")
+ , (0x24B8,"DAI_STAT")
+ , (0x24B8,"DAI_STAT0")
+ , (0x24B9,"DAI_PIN_STAT")
+ , (0x24BA,"DAI_STAT1")
+ , (0x24D0,"IDP_FIFO")
+ , (0x1C00,"SRU2_INPUT0")
+ , (0x1C01,"SRU2_INPUT1")
+ , (0x1C02,"SRU2_INPUT2")
+ , (0x1C03,"SRU2_INPUT3")
+ , (0x1C04,"SRU2_INPUT4")
+ , (0x1C05,"SRU2_INPUT5")
+ , (0x1C10,"SRU2_PIN0")
+ , (0x1C11,"SRU2_PIN1")
+ , (0x1C12,"SRU2_PIN2")
+ , (0x1C20,"SRU2_PBEN0")
+ , (0x1C21,"SRU2_PBEN1")
+ , (0x1C22,"SRU2_PBEN2")
+ , (0x1C30,"DPI_PIN_PULLUP")
+ , (0x1C31,"DPI_PIN_STAT")
+ , (0x1C32,"DPI_IRPTL")
+ , (0x1C33,"DPI_IRPTL_SH")
+ , (0x1C34,"DPI_IRPTL_FE")
+ , (0x1C34,"DPI_IMASK_FE")
+ , (0x1C35,"DPI_IRPTL_RE")
+ , (0x1C35,"DPI_IMASK_RE")
+ , (0x24C0,"PCG_CTLA0")
+ , (0x24C1,"PCG_CTLA1")
+ , (0x24C2,"PCG_CTLB0")
+ , (0x24C3,"PCG_CTLB1")
+ , (0x24C4,"PCG_PW")
+ , (0x24C5,"PCG_SYNC")
+ , (0x24C4,"PCG_PW1")
+ , (0x24C5,"PCG_SYNC1")
+ , (0x24C6,"PCG_CTLC0")
+ , (0x24C7,"PCG_CTLC1")
+ , (0x24C8,"PCG_CTLD0")
+ , (0x24C9,"PCG_CTLD1")
+ , (0x24CA,"PCG_PW2")
+ , (0x24CB,"PCG_SYNC2")
+ , (0x2200,"PICR0")
+ , (0x2201,"PICR1")
+ , (0x2202,"PICR2")
+ , (0x2203,"PICR3")
+ , (0x2c01,"MTMCTL")
+ , (0x2c10,"IIMTMW")
+ , (0x2c11,"IIMTMR")
+ , (0x2c0e,"IMMTMW")
+ , (0x2c0f,"IMMTMR")
+ , (0x2c16,"CMTMW")
+ , (0x2c17,"CMTMR")
+ , (0x3800,"PWMGCTL")
+ , (0x3801,"PWMGSTAT")
+ , (0x3000,"PWMCTL0")
+ , (0x3001,"PWMSTAT0")
+ , (0x3002,"PWMPERIOD0")
+ , (0x3003,"PWMDT0")
+ , (0x3005,"PWMA0")
+ , (0x3006,"PWMB0")
+ , (0x3008,"PWMSEG0")
+ , (0x300A,"PWMAL0")
+ , (0x300B,"PWMBL0")
+ , (0x300E,"PWMDBG0")
+ , (0x300F,"PWMPOL0")
+ , (0x3010,"PWMCTL1")
+ , (0x3011,"PWMSTAT1")
+ , (0x3012,"PWMPERIOD1")
+ , (0x3013,"PWMDT1")
+ , (0x3015,"PWMA1")
+ , (0x3016,"PWMB1")
+ , (0x3018,"PWMSEG1")
+ , (0x301A,"PWMAL1")
+ , (0x301B,"PWMBL1")
+ , (0x301E,"PWMDBG1")
+ , (0x301F,"PWMPOL1")
+ , (0x3400,"PWMCTL2")
+ , (0x3401,"PWMSTAT2")
+ , (0x3402,"PWMPERIOD2")
+ , (0x3403,"PWMDT2")
+ , (0x3405,"PWMA2")
+ , (0x3406,"PWMB2")
+ , (0x3408,"PWMSEG2")
+ , (0x340A,"PWMAL2")
+ , (0x340B,"PWMBL2")
+ , (0x340E,"PWMDBG2")
+ , (0x340F,"PWMPOL2")
+ , (0x3410,"PWMCTL3")
+ , (0x3411,"PWMSTAT3")
+ , (0x3412,"PWMPERIOD3")
+ , (0x3413,"PWMDT3")
+ , (0x3415,"PWMA3")
+ , (0x3416,"PWMB3")
+ , (0x3418,"PWMSEG3")
+ , (0x341A,"PWMAL3")
+ , (0x341B,"PWMBL3")
+ , (0x341E,"PWMDBG3")
+ , (0x341F,"PWMPOL3")
+ , (0x3c00,"UART0THR")
+ , (0x3c00,"UART0RBR")
+ , (0x3c00,"UART0DLL")
+ , (0x3c01,"UART0IER")
+ , (0x3c01,"UART0DLH")
+ , (0x3c02,"UART0IIR")
+ , (0x3c03,"UART0LCR")
+ , (0x3c04,"UART0MODE")
+ , (0x3c05,"UART0LSR")
+ , (0x3c07,"UART0SCR")
+ , (0x3c08,"UART0RBRSH")
+ , (0x3c09,"UART0IIRSH")
+ , (0x3c0a,"UART0LSRSH")
+ , (0x3e00,"IIUART0RX")
+ , (0x3e01,"IMUART0RX")
+ , (0x3e02,"CUART0RX")
+ , (0x3e03,"CPUART0RX")
+ , (0x3e04,"UART0RXCTL")
+ , (0x3e05,"UART0RXSTAT")
+ , (0x3f00,"IIUART0TX")
+ , (0x3f01,"IMUART0TX")
+ , (0x3f02,"CUART0TX")
+ , (0x3f03,"CPUART0TX")
+ , (0x3f04,"UART0TXCTL")
+ , (0x3f05,"UART0TXSTAT")
+ , (0x4000,"UART1THR")
+ , (0x4000,"UART1RBR")
+ , (0x4000,"UART1DLL")
+ , (0x4001,"UART1IER")
+ , (0x4001,"UART1DLH")
+ , (0x4002,"UART1IIR")
+ , (0x4003,"UART1LCR")
+ , (0x4004,"UART1MODE")
+ , (0x4005,"UART1LSR")
+ , (0x4007,"UART1SCR")
+ , (0x4008,"UART1RBRSH")
+ , (0x4009,"UART1IIRSH")
+ , (0x400a,"UART1LSRSH")
+ , (0x4200,"IIUART1RX")
+ , (0x4201,"IMUART1RX")
+ , (0x4202,"CUART1RX")
+ , (0x4203,"CPUART1RX")
+ , (0x4204,"UART1RXCTL")
+ , (0x4205,"UART1RXSTAT")
+ , (0x4300,"IIUART1TX")
+ , (0x4301,"IMUART1TX")
+ , (0x4302,"CUART1TX")
+ , (0x4303,"CPUART1TX")
+ , (0x4304,"UART1TXCTL")
+ , (0x4305,"UART1TXSTAT")
+ , (0x4400,"TWIDIV")
+ , (0x4404,"TWIMITR")
+ , (0x4408,"TWISCTL")
+ , (0x440C,"TWISSTAT")
+ , (0x4410,"TWISADDR")
+ , (0x4414,"TWIMCTL")
+ , (0x4418,"TWIMSTAT")
+ , (0x441C,"TWIMADDR")
+ , (0x4420,"TWIIRPTL")
+ , (0x4424,"TWIIMASK")
+ , (0x4428,"TWIFIFOCTL")
+ , (0x442C,"TWIFIFOSTAT")
+ , (0x4480,"TXTWI8")
+ , (0x4484,"TXTWI16")
+ , (0x4488,"RXTWI8")
+ , (0x448C,"RXTWI16")
+ ]
+
+
data Address24 = Address24 Word32 -- absolute 24 bit address
| RelAddress24 Word32 -- relative 24 bit address
data Address32 = Address32 Word32 -- absolute 32 bit address
| RelAddress32 Word32 -- relative 24 bit address
+-- TODO: only use registerMemoryMap if the address is a DM address
instance Show Address24 where
- show (Address24 w) = printf "0x%06X" w
+ show (Address24 w) = findWithDefault (printf "0x%06X" w) w registerMemoryMap
show (RelAddress24 w) = printf "(PC,%s)" w' -- two's complement
where w' = if w `testBit` 23 then '-' : show (w `xor` 0xFFFFFF) else show w
+-- TODO: only use registerMemoryMap if the address is a DM address
instance Show Address32 where
- show (Address32 w) = printf "0x%08X" w
+ show (Address32 w) = findWithDefault (printf "0x%08X" w) w registerMemoryMap
show (RelAddress32 w) = printf "(PC,%s)" w' -- two's complement
where w' = if w `testBit` 31 then '-' : show (w `xor` 0xFFFFFFFF) else show w
generated by cgit v1.2.3 (git 2.46.0) at 2024-11-21 13:29:43 +0000