diff options
| author | rekado <rekado@elephly.net> | 2012-11-18 18:29:00 +0800 |
|---|---|---|
| committer | rekado <rekado@elephly.net> | 2012-11-18 18:29:00 +0800 |
| commit | cb41d9ffdd12c268b423ae829878a76a6328489e (patch) | |
| tree | 297d63ff79bffed0f5ea547a728267d1e9562701 | |
| parent | 75819e976608433759d55a24657fb9dc9e4c1a80 (diff) | |
add pins for bass effects insert
| -rw-r--r-- | gschem/board.pcb | 210 | ||||
| -rw-r--r-- | gschem/crossover.sch | 773 |
2 files changed, 545 insertions, 438 deletions
diff --git a/gschem/board.pcb b/gschem/board.pcb index 8376253..f4399e1 100644 --- a/gschem/board.pcb +++ b/gschem/board.pcb @@ -6,7 +6,7 @@ FileVersion[20070407] PCB["" 354331 425197] Grid[2500.0 0 0 0] -Cursor[260000 225000 0.000000] +Cursor[25000 142500 0.000000] PolyArea[3100.006200] Thermal[0.500000] DRC[1000 1000 1000 1000 1500 1000] @@ -816,7 +816,7 @@ Element["" "ACY100" "C104" "10p" 115000 315000 9500 2800 0 100 ""] Element["" "R025" "R204" "100" 20000 360000 12000 -2000 0 100 ""] ( - Pin[0 0 6800 3000 7400 3800 "1" "1" "found,square,edge2"] + Pin[0 0 6800 3000 7400 3800 "1" "1" "square,edge2"] Pin[40000 0 6800 3000 7400 3800 "2" "2" "edge2"] ElementLine [10000 -5000 30000 -5000 2000] ElementLine [30000 -5000 30000 5000 2000] @@ -925,7 +925,7 @@ Element["" "CK06_type_capacitor" "C103" "0.47u" 125000 380000 14400 -37000 3 150 Element["" "R025" "R104" "100" 215000 360000 -12000 2000 2 100 ""] ( - Pin[0 0 6800 3000 7400 3800 "1" "1" "found,square,edge2"] + Pin[0 0 6800 3000 7400 3800 "1" "1" "square,edge2"] Pin[-40000 0 6800 3000 7400 3800 "2" "2" "edge2"] ElementLine [-30000 5000 -10000 5000 2000] ElementLine [-30000 -5000 -30000 5000 2000] @@ -998,7 +998,7 @@ Element["" "R025" "R103" "5.1M" 185000 297500 -2000 -12000 1 100 ""] Element["" "R025" "R201" "10k" 20000 345000 12000 -2000 0 100 ""] ( Pin[0 0 6800 3000 7400 3800 "1" "1" "square,edge2"] - Pin[40000 0 6800 3000 7400 3800 "2" "2" "found,edge2"] + Pin[40000 0 6800 3000 7400 3800 "2" "2" "edge2"] ElementLine [10000 -5000 30000 -5000 2000] ElementLine [30000 -5000 30000 5000 2000] ElementLine [10000 5000 30000 5000 2000] @@ -1043,7 +1043,7 @@ Element["" "TO92" "Q201" "unknown" 75000 325000 13000 1000 3 100 ""] Element["" "R025" "R101" "10k" 215000 345000 -12000 2000 2 100 ""] ( Pin[0 0 6800 3000 7400 3800 "1" "1" "square,edge2"] - Pin[-40000 0 6800 3000 7400 3800 "2" "2" "found,edge2"] + Pin[-40000 0 6800 3000 7400 3800 "2" "2" "edge2"] ElementLine [-30000 5000 -10000 5000 2000] ElementLine [-30000 -5000 -30000 5000 2000] ElementLine [-30000 -5000 -10000 -5000 2000] @@ -1246,7 +1246,7 @@ Element["" "R025" "R305" "5M1" 310000 345000 2000 12000 3 100 ""] Element["" "TO92" "Q302" "unknown" 305000 335000 -13000 -1000 1 100 ""] ( - Pin[0 -20000 7200 3000 7800 4200 "D" "1" "found,square"] + Pin[0 -20000 7200 3000 7800 4200 "D" "1" "square"] Pin[0 -10000 7200 3000 7800 4200 "S" "2" ""] Pin[0 0 7200 3000 7800 4200 "G" "3" ""] ElementLine [-7000 -17000 -7000 -3000 1000] @@ -1257,7 +1257,7 @@ Element["" "TO92" "Q302" "unknown" 305000 335000 -13000 -1000 1 100 ""] Element["" "R025" "R306" "5M1" 325000 355000 -2000 -12000 1 100 ""] ( Pin[0 0 6800 3000 7400 3800 "1" "1" "square"] - Pin[0 -40000 6800 3000 7400 3800 "2" "2" "found"] + Pin[0 -40000 6800 3000 7400 3800 "2" "2" ""] ElementLine [-5000 -30000 -5000 -10000 2000] ElementLine [-5000 -30000 5000 -30000 2000] ElementLine [5000 -30000 5000 -10000 2000] @@ -1380,7 +1380,7 @@ Element["" "CK06_type_capacitor" "C402" "56n" 162500 185000 14400 -37000 3 150 " Element["" "CK06_type_capacitor" "C407" "100n" 127500 185000 14400 -37000 3 150 ""] ( - Pin[0 0 8000 3000 11000 3500 "1" "1" "found,thermal(5)"] + Pin[0 0 8000 3000 11000 3500 "1" "1" "thermal(5)"] Pin[0 -20000 8000 3000 11000 3500 "2" "2" "thermal(1X,4)"] ElementLine [-5000 5000 5000 5000 1000] ElementLine [5000 -25000 5000 5000 1000] @@ -1437,7 +1437,7 @@ Element["" "DIL-8-300" "IC401" "unknown" 112500 165000 -5000 17000 2 100 ""] Pin[-30000 30000 6000 3000 6600 2800 "IN+" "5" "edge2"] Pin[-20000 30000 6000 3000 6600 2800 "IN-" "6" "edge2"] Pin[-10000 30000 6000 3000 6600 2800 "OUT" "7" "edge2"] - Pin[0 30000 6000 3000 6600 2800 "V+" "8" "found,edge2"] + Pin[0 30000 6000 3000 6600 2800 "V+" "8" "edge2"] ElementLine [-35000 -5000 5000 -5000 1000] ElementLine [-35000 -5000 -35000 35000 1000] ElementLine [-35000 35000 5000 35000 1000] @@ -1673,7 +1673,7 @@ Element["" "DIL-8-300" "IC402" "unknown" 92500 82500 -17000 -5000 1 100 ""] Pin[-30000 -30000 6000 3000 6600 2800 "IN+" "5" ""] Pin[-30000 -20000 6000 3000 6600 2800 "IN-" "6" ""] Pin[-30000 -10000 6000 3000 6600 2800 "OUT" "7" ""] - Pin[-30000 0 6000 3000 6600 2800 "V+" "8" "found"] + Pin[-30000 0 6000 3000 6600 2800 "V+" "8" ""] ElementLine [5000 -35000 5000 5000 1000] ElementLine [-35000 -35000 5000 -35000 1000] ElementLine [-35000 -35000 -35000 5000 1000] @@ -1685,7 +1685,7 @@ Element["" "DIL-8-300" "IC402" "unknown" 92500 82500 -17000 -5000 1 100 ""] Element["" "CK06_type_capacitor" "C408" "100n" 62500 97500 37000 14400 2 150 ""] ( - Pin[0 0 8000 3000 11000 3500 "1" "1" "found,edge2,thermal(5)"] + Pin[0 0 8000 3000 11000 3500 "1" "1" "edge2,thermal(5)"] Pin[20000 0 8000 3000 11000 3500 "2" "2" "edge2,thermal(1X,4)"] ElementLine [-5000 -5000 -5000 5000 1000] ElementLine [-5000 5000 25000 5000 1000] @@ -1772,7 +1772,7 @@ Element["" "R025" "R422" "100k" 147500 245000 12000 -2000 0 100 ""] Element["" "R025" "R109" "220k" 170000 297500 -2000 -12000 1 100 ""] ( - Pin[0 0 6800 3000 7400 3800 "1" "1" "found,square"] + Pin[0 0 6800 3000 7400 3800 "1" "1" "square"] Pin[0 -40000 6800 3000 7400 3800 "2" "2" ""] ElementLine [-5000 -30000 -5000 -10000 2000] ElementLine [-5000 -30000 5000 -30000 2000] @@ -1785,7 +1785,7 @@ Element["" "R025" "R109" "220k" 170000 297500 -2000 -12000 1 100 ""] Element["" "R025" "R209" "220k" 65000 297500 -2000 -12000 1 100 ""] ( - Pin[0 0 6800 3000 7400 3800 "1" "1" "found,square"] + Pin[0 0 6800 3000 7400 3800 "1" "1" "square"] Pin[0 -40000 6800 3000 7400 3800 "2" "2" ""] ElementLine [-5000 -30000 -5000 -10000 2000] ElementLine [-5000 -30000 5000 -30000 2000] @@ -1881,7 +1881,7 @@ Element["" "DIL-8-300" "IC501" "unknown" 215000 137500 17000 5000 3 100 ""] Pin[30000 30000 6000 3000 6600 2800 "IN+" "5" ""] Pin[30000 20000 6000 3000 6600 2800 "IN-" "6" ""] Pin[30000 10000 6000 3000 6600 2800 "OUT" "7" ""] - Pin[30000 0 6000 3000 6600 2800 "V+" "8" "found"] + Pin[30000 0 6000 3000 6600 2800 "V+" "8" ""] ElementLine [-5000 -5000 -5000 35000 1000] ElementLine [-5000 35000 35000 35000 1000] ElementLine [35000 -5000 35000 35000 1000] @@ -1971,7 +1971,7 @@ Element["" "R025" "R506" "100k" 243500 195000 2000 12000 3 100 ""] Element["" "CK06_type_capacitor" "C501" "100n" 235000 122500 -37000 -14400 0 150 ""] ( - Pin[0 0 8000 3000 11000 3500 "1" "1" "found,edge2,thermal(5)"] + Pin[0 0 8000 3000 11000 3500 "1" "1" "edge2,thermal(5)"] Pin[-20000 0 8000 3000 11000 3500 "2" "2" "edge2,thermal(1X,4)"] ElementLine [5000 -5000 5000 5000 1000] ElementLine [-25000 -5000 5000 -5000 1000] @@ -1983,7 +1983,7 @@ Element["" "CK06_type_capacitor" "C501" "100n" 235000 122500 -37000 -14400 0 150 Element["" "ALF300" "Z502" "unknown" 225000 60500 5000 22000 3 100 ""] ( Pin[0 0 5000 3000 5600 2000 "1" "1" "square"] - Pin[0 30000 5000 3000 5600 2000 "2" "2" "found"] + Pin[0 30000 5000 3000 5600 2000 "2" "2" ""] ElementLine [0 0 0 10000 1000] ElementLine [0 20000 0 30000 1000] ElementLine [0 10000 5000 20000 1000] @@ -2004,7 +2004,7 @@ Element["" "RCY100" "C505" "22u" 235000 45000 -15000 10000 2 100 ""] Element["" "ALF300" "Z501" "unknown" 325000 60000 5000 22000 3 100 ""] ( Pin[0 0 5000 3000 5600 2000 "1" "1" "square"] - Pin[0 30000 5000 3000 5600 2000 "2" "2" "found"] + Pin[0 30000 5000 3000 5600 2000 "2" "2" ""] ElementLine [0 0 0 10000 1000] ElementLine [0 20000 0 30000 1000] ElementLine [0 10000 5000 20000 1000] @@ -2070,7 +2070,7 @@ Element["" "DIL-8-300" "IC502" "unknown" 265000 35000 17000 5000 3 100 ""] Pin[30000 30000 6000 3000 6600 2800 "IN+" "5" ""] Pin[30000 20000 6000 3000 6600 2800 "IN-" "6" ""] Pin[30000 10000 6000 3000 6600 2800 "OUT" "7" ""] - Pin[30000 0 6000 3000 6600 2800 "V+" "8" "found"] + Pin[30000 0 6000 3000 6600 2800 "V+" "8" ""] ElementLine [-5000 -5000 -5000 35000 1000] ElementLine [-5000 35000 35000 35000 1000] ElementLine [35000 -5000 35000 35000 1000] @@ -2082,7 +2082,7 @@ Element["" "DIL-8-300" "IC502" "unknown" 265000 35000 17000 5000 3 100 ""] Element["" "CK06_type_capacitor" "C507" "100n" 286500 78500 -37000 -14400 0 150 ""] ( - Pin[0 0 8000 3000 11000 3500 "1" "1" "found,edge2,thermal(5)"] + Pin[0 0 8000 3000 11000 3500 "1" "1" "edge2,thermal(5)"] Pin[-20000 0 8000 3000 11000 3500 "2" "2" "edge2,thermal(1X,4)"] ElementLine [5000 -5000 5000 5000 1000] ElementLine [-25000 -5000 5000 -5000 1000] @@ -2202,6 +2202,32 @@ Element["" "CK06_type_capacitor" "C203" "0.47u" 110000 380000 14400 -37000 3 150 ElementLine [-5000 -25000 -5000 5000 1000] ) + +Element["" "CONNECTOR-2-1" "CONN402" "unknown" 182500 70000 11000 -5000 3 100 ""] +( + Pin[0 0 6000 3000 6600 3800 "1" "1" "square"] + Pin[0 10000 6000 3000 6600 3800 "2" "2" ""] + ElementLine [-5000 -5000 -5000 15000 1000] + ElementLine [-5000 15000 5000 15000 1000] + ElementLine [5000 15000 5000 -5000 1000] + ElementLine [5000 -5000 -5000 -5000 1000] + ElementLine [-5000 5000 5000 5000 1000] + ElementLine [5000 5000 5000 -5000 1000] + + ) + +Element["" "CONNECTOR-2-1" "CONN401" "unknown" 12500 132500 11000 -5000 3 100 ""] +( + Pin[0 0 6000 3000 6600 3800 "1" "1" "square"] + Pin[0 10000 6000 3000 6600 3800 "2" "2" ""] + ElementLine [-5000 -5000 -5000 15000 1000] + ElementLine [-5000 15000 5000 15000 1000] + ElementLine [5000 15000 5000 -5000 1000] + ElementLine [5000 -5000 -5000 -5000 1000] + ElementLine [-5000 5000 5000 5000 1000] + ElementLine [5000 5000 5000 -5000 1000] + + ) Rat[197500 30000 1 0 0 1 "via"] Rat[142500 210000 1 215000 157500 1 ""] Rat[215000 157500 1 245000 167500 1 ""] @@ -2213,6 +2239,8 @@ Rat[304000 190000 1 326500 170000 1 ""] Rat[207500 30000 1 295000 345000 1 ""] Rat[325000 355000 1 305000 335000 1 ""] Rat[200000 15000 1 285000 285000 1 ""] +Rat[12500 132500 1 25000 155000 1 ""] +Rat[182500 70000 1 167500 65000 1 ""] Rat[245000 157500 1 243500 195000 1 ""] Rat[245000 157500 1 281500 167500 1 ""] Rat[243500 195000 1 291500 232500 1 ""] @@ -2288,13 +2316,13 @@ Layer(2 "solder") Line[72500 345000 60000 332500 2000 2000 "clearline"] Line[60000 332500 60000 320000 2000 2000 "clearline"] Line[27500 337500 27500 305000 2000 2000 "clearline"] - Line[60000 345000 35000 345000 2000 2000 "found,clearline"] - Line[35000 345000 20000 360000 2000 2000 "found,clearline"] + Line[60000 345000 35000 345000 2000 2000 "clearline"] + Line[35000 345000 20000 360000 2000 2000 "clearline"] Line[75000 325000 75000 322500 2000 2000 "clearline"] Line[75000 322500 50000 297500 2000 2000 "clearline"] Line[175000 320000 175000 330000 2000 2000 "clearline"] Line[175000 330000 160000 345000 2000 2000 "clearline"] - Line[175000 345000 200000 345000 2000 2000 "found,clearline"] + Line[175000 345000 200000 345000 2000 2000 "clearline"] Line[160000 325000 160000 322500 2000 2000 "clearline"] Line[160000 322500 185000 297500 2000 2000 "clearline"] Line[207500 305000 201250 298750 2000 2000 "clearline"] @@ -2331,10 +2359,10 @@ Layer(2 "solder") Line[275000 355000 285000 355000 2000 2000 "clearline"] Line[285000 355000 295000 345000 2000 2000 "clearline"] Line[300000 395000 325000 370000 2000 2000 "clearline"] - Line[287500 330000 287500 322500 2000 2000 "found,clearline"] - Line[287500 322500 295000 315000 2000 2000 "found,clearline"] + Line[287500 330000 287500 322500 2000 2000 "clearline"] + Line[287500 322500 295000 315000 2000 2000 "clearline"] Line[325000 370000 325000 355000 2000 2000 "clearline"] - Line[295000 315000 325000 315000 2000 2000 "found,clearline"] + Line[295000 315000 325000 315000 2000 2000 "clearline"] Line[305000 325000 327500 325000 2000 2000 "clearline"] Line[327500 325000 332500 320000 2000 2000 "clearline"] Line[332500 320000 332500 310000 2000 2000 "clearline"] @@ -2350,8 +2378,8 @@ Layer(2 "solder") Line[142500 210000 132500 200000 2000 2000 "clearline"] Line[172500 200000 172500 195000 2000 2000 "clearline"] Line[172500 195000 162500 185000 2000 2000 "clearline"] - Line[112500 195000 117500 195000 2500 2000 "found,clearline"] - Line[117500 195000 127500 185000 2500 2000 "found,clearline"] + Line[112500 195000 117500 195000 2500 2000 "clearline"] + Line[117500 195000 127500 185000 2500 2000 "clearline"] Line[92500 210000 90000 210000 2000 2000 "clearline"] Line[90000 210000 82500 202500 2000 2000 "clearline"] Line[82500 202500 82500 195000 2000 2000 "clearline"] @@ -2381,8 +2409,8 @@ Layer(2 "solder") Line[97500 127500 112500 112500 2000 2000 "clearline"] Line[112500 165000 112500 127500 2000 2000 "clearline"] Line[112500 127500 127500 112500 2000 2000 "clearline"] - Line[127500 185000 130000 185000 2000 2000 "found,clearline"] - Line[130000 185000 152500 207500 2000 2000 "found,clearline"] + Line[127500 185000 130000 185000 2000 2000 "clearline"] + Line[130000 185000 152500 207500 2000 2000 "clearline"] Line[172500 230000 172500 215000 2000 2000 "clearline"] Line[185000 210000 182500 210000 2000 2000 "clearline"] Line[182500 210000 172500 200000 2000 2000 "clearline"] @@ -2406,7 +2434,7 @@ Layer(2 "solder") Line[202500 245000 207500 240000 2000 2000 "clearline"] Line[207500 215000 207500 240000 2000 2000 "clearline"] Line[217500 297500 217500 230000 2000 2000 "clearline"] - Line[62500 97500 62500 82500 2500 2000 "found,clearline"] + Line[62500 97500 62500 82500 2500 2000 "clearline"] Line[92500 82500 122500 82500 2000 2000 "clearline"] Line[67500 122500 67500 112500 2000 2000 "clearline"] Line[67500 112500 75000 105000 2000 2000 "clearline"] @@ -2443,48 +2471,48 @@ Layer(2 "solder") Line[167500 65000 167500 82500 2000 2000 "clearline"] Line[157500 112500 157500 110000 2000 2000 "clearline"] Line[157500 110000 167500 100000 2000 2000 "clearline"] - Line[215000 360000 197500 342500 2000 2000 "found,clearline"] - Line[197500 342500 197500 310000 2000 2000 "found,clearline"] - Line[197500 310000 192500 305000 2000 2000 "found,clearline"] - Line[192500 305000 192500 290000 2000 2000 "found,clearline"] - Line[192500 290000 185000 282500 2000 2000 "found,clearline"] - Line[185000 282500 175000 282500 2000 2000 "found,clearline"] - Line[170000 287500 170000 297500 2000 2000 "found,clearline"] + Line[215000 360000 197500 342500 2000 2000 "clearline"] + Line[197500 342500 197500 310000 2000 2000 "clearline"] + Line[197500 310000 192500 305000 2000 2000 "clearline"] + Line[192500 305000 192500 290000 2000 2000 "clearline"] + Line[192500 290000 185000 282500 2000 2000 "clearline"] + Line[185000 282500 175000 282500 2000 2000 "clearline"] + Line[170000 287500 170000 297500 2000 2000 "clearline"] Line[200000 297500 200000 272500 2000 2000 "clearline"] Line[200000 272500 185000 257500 2000 2000 "clearline"] - Line[177500 250000 177500 280000 2000 2000 "found,clearline"] - Line[170000 287500 177500 280000 2000 2000 "found,clearline"] + Line[177500 250000 177500 280000 2000 2000 "clearline"] + Line[170000 287500 177500 280000 2000 2000 "clearline"] Line[147500 245000 132500 230000 2000 2000 "clearline"] Line[155000 297500 155000 272500 2000 2000 "clearline"] Line[155000 272500 170000 257500 2000 2000 "clearline"] - Line[177500 250000 152500 225000 2000 2000 "found,clearline"] - Line[152500 207500 152500 225000 2000 2000 "found,clearline"] + Line[177500 250000 152500 225000 2000 2000 "clearline"] + Line[152500 207500 152500 225000 2000 2000 "clearline"] Line[27500 305000 35000 297500 2000 2000 "clearline"] Line[35000 297500 35000 272500 2000 2000 "clearline"] Line[35000 272500 50000 257500 2000 2000 "clearline"] - Line[65000 297500 65000 287500 2000 2000 "found,clearline"] - Line[65000 287500 60000 282500 2000 2000 "found,clearline"] - Line[60000 282500 50000 282500 2000 2000 "found,clearline"] - Line[50000 282500 42500 290000 2000 2000 "found,clearline"] - Line[42500 290000 42500 302500 2000 2000 "found,clearline"] - Line[42500 302500 35000 310000 2000 2000 "found,clearline"] - Line[35000 310000 35000 345000 2000 2000 "found,clearline"] + Line[65000 297500 65000 287500 2000 2000 "clearline"] + Line[65000 287500 60000 282500 2000 2000 "clearline"] + Line[60000 282500 50000 282500 2000 2000 "clearline"] + Line[50000 282500 42500 290000 2000 2000 "clearline"] + Line[42500 290000 42500 302500 2000 2000 "clearline"] + Line[42500 302500 35000 310000 2000 2000 "clearline"] + Line[35000 310000 35000 345000 2000 2000 "clearline"] Line[80000 297500 80000 272500 2000 2000 "clearline"] Line[80000 272500 65000 257500 2000 2000 "clearline"] - Line[57500 282500 57500 220000 2000 2000 "found,clearline"] - Line[80000 212500 87500 220000 2000 2000 "found,clearline"] - Line[87500 220000 95000 220000 2000 2000 "found,clearline"] - Line[95000 220000 102500 212500 2000 2000 "found,clearline"] - Line[102500 212500 102500 205000 2000 2000 "found,clearline"] - Line[102500 205000 112500 195000 2000 2000 "found,clearline"] - Line[65000 212500 80000 212500 2000 2000 "found,clearline"] - Line[57500 220000 65000 212500 2000 2000 "found,clearline"] + Line[57500 282500 57500 220000 2000 2000 "clearline"] + Line[80000 212500 87500 220000 2000 2000 "clearline"] + Line[87500 220000 95000 220000 2000 2000 "clearline"] + Line[95000 220000 102500 212500 2000 2000 "clearline"] + Line[102500 212500 102500 205000 2000 2000 "clearline"] + Line[102500 205000 112500 195000 2000 2000 "clearline"] + Line[65000 212500 80000 212500 2000 2000 "clearline"] + Line[57500 220000 65000 212500 2000 2000 "clearline"] Line[75000 240000 70000 235000 2000 2000 "clearline"] Line[80000 230000 70000 220000 2000 2000 "clearline"] Line[22500 227500 30000 235000 2000 2000 "clearline"] Line[30000 220000 40000 220000 2000 2000 "clearline"] - Line[235000 122500 235000 127500 2500 2000 "found,clearline"] - Line[235000 127500 245000 137500 2500 2000 "found,clearline"] + Line[235000 122500 235000 127500 2500 2000 "clearline"] + Line[235000 127500 245000 137500 2500 2000 "clearline"] Line[112500 395000 112500 382500 2000 2000 "clearline"] Line[112500 382500 110000 380000 2000 2000 "clearline"] Line[122500 395000 122500 382500 2000 2000 "clearline"] @@ -2540,6 +2568,8 @@ NetList() Connect("IC502-4") Connect("K101-5") Connect("K301-5") + Connect("K401-5") + Connect("K402-5") Connect("R102-1") Connect("R105-2") Connect("R106-2") @@ -2649,15 +2679,15 @@ NetList() Connect("R105-1") Connect("S401-1") ) - Net("SEND_HIGH" "(unknown)") + Net("RETURN_HIGH" "(unknown)") ( - Connect("R420-1") - Connect("R421-3") + Connect("CONN402-2") + Connect("K402-1") ) - Net("SEND_LOW" "(unknown)") + Net("RETURN_LOW" "(unknown)") ( - Connect("R418-1") - Connect("R419-3") + Connect("CONN401-2") + Connect("K401-1") ) Net("unnamed_net1" "(unknown)") ( @@ -2880,63 +2910,87 @@ NetList() ) Net("unnamed_net36" "(unknown)") ( + Connect("CONN401-1") + Connect("K401-4") + Connect("R418-1") + Connect("R419-3") + ) + Net("unnamed_net37" "(unknown)") + ( Connect("C409-2") Connect("R419-2") ) - Net("unnamed_net37" "(unknown)") + Net("unnamed_net38" "(unknown)") + ( + Connect("CONN402-1") + Connect("K402-4") + Connect("R420-1") + Connect("R421-3") + ) + Net("unnamed_net39" "(unknown)") ( Connect("C410-2") Connect("R421-2") ) - Net("unnamed_net38" "(unknown)") + Net("unnamed_net40" "(unknown)") + ( + Connect("K402-2") + Connect("K402-3") + ) + Net("unnamed_net41" "(unknown)") + ( + Connect("K401-2") + Connect("K401-3") + ) + Net("unnamed_net42" "(unknown)") ( Connect("IC501-6") Connect("R506-1") Connect("R507-2") Connect("R508-1") ) - Net("unnamed_net39" "(unknown)") + Net("unnamed_net43" "(unknown)") ( Connect("C508-1") Connect("IC501-7") Connect("R507-1") ) - Net("unnamed_net40" "(unknown)") + Net("unnamed_net44" "(unknown)") ( Connect("IC501-2") Connect("R503-1") Connect("R504-1") Connect("R505-2") ) - Net("unnamed_net41" "(unknown)") + Net("unnamed_net45" "(unknown)") ( Connect("C502-1") Connect("IC501-1") Connect("R505-1") ) - Net("unnamed_net42" "(unknown)") + Net("unnamed_net46" "(unknown)") ( Connect("R501-1") Connect("R502-3") Connect("R511-2") ) - Net("unnamed_net43" "(unknown)") + Net("unnamed_net47" "(unknown)") ( Connect("C502-2") Connect("R502-2") ) - Net("unnamed_net44" "(unknown)") + Net("unnamed_net48" "(unknown)") ( Connect("C504-2") Connect("R504-2") Connect("R506-2") ) - Net("unnamed_net45" "(unknown)") + Net("unnamed_net49" "(unknown)") ( Connect("IC502-3") Connect("R511-1") ) - Net("unnamed_net46" "(unknown)") + Net("unnamed_net50" "(unknown)") ( Connect("C505-1") Connect("IC502-1") @@ -2944,25 +2998,25 @@ NetList() Connect("R513-1") Connect("Z502-1") ) - Net("unnamed_net47" "(unknown)") + Net("unnamed_net51" "(unknown)") ( Connect("IC502-6") Connect("R512-2") Connect("R513-2") ) - Net("unnamed_net48" "(unknown)") + Net("unnamed_net52" "(unknown)") ( Connect("C506-1") Connect("IC502-7") Connect("R512-1") Connect("Z501-1") ) - Net("unnamed_net49" "(unknown)") + Net("unnamed_net53" "(unknown)") ( Connect("C505-2") Connect("R509-2") ) - Net("unnamed_net50" "(unknown)") + Net("unnamed_net54" "(unknown)") ( Connect("C506-2") Connect("R510-2") diff --git a/gschem/crossover.sch b/gschem/crossover.sch index e9cca60..486e2d7 100644 --- a/gschem/crossover.sch +++ b/gschem/crossover.sch @@ -1,630 +1,621 @@ v 20110115 2 -C 50400 45200 1 0 0 input-2.sym +C 48100 44800 1 0 0 input-2.sym { -T 50400 45400 5 10 1 0 0 0 1 +T 48100 45000 5 10 1 0 0 0 1 net=BYPASS:1 -T 51000 45900 5 10 0 0 0 0 1 +T 48700 45500 5 10 0 0 0 0 1 device=none -T 50900 45300 5 10 1 1 0 7 1 +T 48600 44900 5 10 1 1 0 7 1 value=BYPASS } -C 40500 37300 1 0 0 input-2.sym +C 39500 37000 1 0 0 input-2.sym { -T 40500 37500 5 10 1 0 0 0 1 +T 39500 37200 5 10 1 0 0 0 1 net=XOVER:1 -T 41100 38000 5 10 0 0 0 0 1 +T 40100 37700 5 10 0 0 0 0 1 device=none -T 41000 37400 5 10 1 1 0 7 1 +T 40000 37100 5 10 1 1 0 7 1 value=XOVER } -C 48200 41900 1 180 0 dual-opamp-1.sym +C 47200 41600 1 180 0 dual-opamp-1.sym { -T 48000 39600 5 10 0 0 180 0 1 +T 47000 39300 5 10 0 0 180 0 1 device=DUAL_OPAMP -T 48300 41000 5 10 1 1 180 0 1 +T 47300 40700 5 10 1 1 180 0 1 refdes=IC401 -T 48000 40000 5 10 0 0 180 0 1 +T 47000 39700 5 10 0 0 180 0 1 footprint=DIL 8 300 -T 48000 39400 5 10 0 0 180 0 1 +T 47000 39100 5 10 0 0 180 0 1 symversion=0.2 -T 48200 41900 5 10 0 0 180 0 1 +T 47200 41600 5 10 0 0 180 0 1 slot=1 } -C 48200 37800 1 180 0 dual-opamp-1.sym +C 47200 37500 1 180 0 dual-opamp-1.sym { -T 48000 35500 5 10 0 0 180 0 1 +T 47000 35200 5 10 0 0 180 0 1 device=DUAL_OPAMP -T 48300 36900 5 10 1 1 180 0 1 +T 47300 36600 5 10 1 1 180 0 1 refdes=IC401 -T 48000 35900 5 10 0 0 180 0 1 +T 47000 35600 5 10 0 0 180 0 1 footprint=DIL 8 300 -T 48000 35300 5 10 0 0 180 0 1 +T 47000 35000 5 10 0 0 180 0 1 symversion=0.2 -T 48200 37800 5 10 0 0 180 0 1 +T 47200 37500 5 10 0 0 180 0 1 slot=2 } -C 54500 46700 1 0 0 dual-opamp-1.sym +C 52200 46300 1 0 0 dual-opamp-1.sym { -T 54700 49000 5 10 0 0 0 0 1 +T 52400 48600 5 10 0 0 0 0 1 device=DUAL_OPAMP -T 55200 46800 5 10 1 1 0 0 1 +T 52900 46400 5 10 1 1 0 0 1 refdes=IC402 -T 54700 48600 5 10 0 0 0 0 1 +T 52400 48200 5 10 0 0 0 0 1 footprint=DIL 8 300 -T 54700 49200 5 10 0 0 0 0 1 +T 52400 48800 5 10 0 0 0 0 1 symversion=0.2 -T 54500 46700 5 10 0 0 0 0 1 +T 52200 46300 5 10 0 0 0 0 1 slot=1 } -C 54500 42800 1 0 0 dual-opamp-1.sym +C 52200 42400 1 0 0 dual-opamp-1.sym { -T 54700 45100 5 10 0 0 0 0 1 +T 52400 44700 5 10 0 0 0 0 1 device=DUAL_OPAMP -T 55200 42900 5 10 1 1 0 0 1 +T 52900 42500 5 10 1 1 0 0 1 refdes=IC402 -T 54700 44700 5 10 0 0 0 0 1 +T 52400 44300 5 10 0 0 0 0 1 footprint=DIL 8 300 -T 54700 45300 5 10 0 0 0 0 1 +T 52400 44900 5 10 0 0 0 0 1 symversion=0.2 -T 54500 42800 5 10 0 0 0 0 1 +T 52200 42400 5 10 0 0 0 0 1 slot=2 } -C 43800 39900 1 180 0 capacitor-1.sym +C 42800 39600 1 180 0 capacitor-1.sym { -T 43600 39200 5 10 0 0 180 0 1 +T 42600 38900 5 10 0 0 180 0 1 device=CAPACITOR -T 43500 39400 5 10 1 1 180 0 1 +T 42500 39100 5 10 1 1 180 0 1 refdes=C401 -T 43600 39000 5 10 0 0 180 0 1 +T 42600 38700 5 10 0 0 180 0 1 symversion=0.1 -T 43200 40000 5 10 1 1 0 0 1 +T 42200 39700 5 10 1 1 0 0 1 value=56n -T 43800 39900 5 10 0 1 0 0 1 +T 42800 39600 5 10 0 1 0 0 1 footprint=CK06_type_capacitor } -C 44400 40200 1 90 0 capacitor-1.sym +C 43400 39900 1 90 0 capacitor-1.sym { -T 43700 40400 5 10 0 0 90 0 1 +T 42700 40100 5 10 0 0 90 0 1 device=CAPACITOR -T 44000 41000 5 10 1 1 180 0 1 +T 43000 40700 5 10 1 1 180 0 1 refdes=C402 -T 43500 40400 5 10 0 0 90 0 1 +T 42500 40100 5 10 0 0 90 0 1 symversion=0.1 -T 44300 40800 5 10 1 1 0 0 1 +T 43300 40500 5 10 1 1 0 0 1 value=56n -T 44400 40200 5 10 0 1 0 0 1 +T 43400 39900 5 10 0 1 0 0 1 footprint=CK06_type_capacitor } -C 47700 43400 1 180 0 capacitor-1.sym +C 46700 43100 1 180 0 capacitor-1.sym { -T 47500 42700 5 10 0 0 180 0 1 +T 46500 42400 5 10 0 0 180 0 1 device=CAPACITOR -T 47100 43500 5 10 1 1 180 0 1 +T 46100 43200 5 10 1 1 180 0 1 refdes=C403 -T 47500 42500 5 10 0 0 180 0 1 +T 46500 42200 5 10 0 0 180 0 1 symversion=0.1 -T 47400 43300 5 10 1 1 0 0 1 +T 46400 43000 5 10 1 1 0 0 1 value=56n -T 47700 43400 5 10 0 1 0 0 1 +T 46700 43100 5 10 0 1 0 0 1 footprint=CK06_type_capacitor } -C 45500 37600 1 180 0 capacitor-1.sym +C 44500 37300 1 180 0 capacitor-1.sym { -T 45300 36900 5 10 0 0 180 0 1 +T 44300 36600 5 10 0 0 180 0 1 device=CAPACITOR -T 45200 37100 5 10 1 1 180 0 1 +T 44200 36800 5 10 1 1 180 0 1 refdes=C404 -T 45300 36700 5 10 0 0 180 0 1 +T 44300 36400 5 10 0 0 180 0 1 symversion=0.1 -T 44900 37700 5 10 1 1 0 0 1 +T 43900 37400 5 10 1 1 0 0 1 value=56n -T 45500 37600 5 10 0 1 0 0 1 +T 44500 37300 5 10 0 1 0 0 1 footprint=CK06_type_capacitor } -C 45500 35800 1 180 0 capacitor-1.sym +C 44500 35500 1 180 0 capacitor-1.sym { -T 45300 35100 5 10 0 0 180 0 1 +T 44300 34800 5 10 0 0 180 0 1 device=CAPACITOR -T 45200 35300 5 10 1 1 180 0 1 +T 44200 35000 5 10 1 1 180 0 1 refdes=C405 -T 45300 34900 5 10 0 0 180 0 1 +T 44300 34600 5 10 0 0 180 0 1 symversion=0.1 -T 44900 35900 5 10 1 1 0 0 1 +T 43900 35600 5 10 1 1 0 0 1 value=56n -T 45500 35800 5 10 0 1 0 0 1 +T 44500 35500 5 10 0 1 0 0 1 footprint=CK06_type_capacitor } -C 49800 37800 1 180 0 capacitor-1.sym +C 48800 37500 1 180 0 capacitor-1.sym { -T 49600 37100 5 10 0 0 180 0 1 +T 48600 36800 5 10 0 0 180 0 1 device=CAPACITOR -T 49200 37900 5 10 1 1 180 0 1 +T 48200 37600 5 10 1 1 180 0 1 refdes=C406 -T 49600 36900 5 10 0 0 180 0 1 +T 48600 36600 5 10 0 0 180 0 1 symversion=0.1 -T 49500 37700 5 10 1 1 0 0 1 +T 48500 37400 5 10 1 1 0 0 1 value=56n -T 49800 37800 5 10 0 1 0 0 1 +T 48800 37500 5 10 0 1 0 0 1 footprint=CK06_type_capacitor } -C 44600 39600 1 0 0 resistor-2.sym +C 43600 39300 1 0 0 resistor-2.sym { -T 45000 39950 5 10 0 0 0 0 1 +T 44000 39650 5 10 0 0 0 0 1 device=RESISTOR -T 44900 39900 5 10 1 1 0 0 1 +T 43900 39600 5 10 1 1 0 0 1 refdes=R401 -T 44900 39400 5 10 1 1 0 0 1 +T 43900 39100 5 10 1 1 0 0 1 value=6k8 -T 44600 39600 5 10 0 1 0 0 1 +T 43600 39300 5 10 0 1 0 0 1 footprint=R025 } -C 46800 38500 1 0 0 resistor-2.sym +C 45800 38200 1 0 0 resistor-2.sym { -T 47200 38850 5 10 0 0 0 0 1 +T 46200 38550 5 10 0 0 0 0 1 device=RESISTOR -T 47000 38800 5 10 1 1 0 0 1 +T 46000 38500 5 10 1 1 0 0 1 refdes=R402 -T 47000 38300 5 10 1 1 0 0 1 +T 46000 38000 5 10 1 1 0 0 1 value=6k8 -T 46800 38500 5 10 0 1 0 0 1 +T 45800 38200 5 10 0 1 0 0 1 footprint=R025 } -C 44600 41400 1 0 0 resistor-2.sym +C 43600 41100 1 0 0 resistor-2.sym { -T 45000 41750 5 10 0 0 0 0 1 +T 44000 41450 5 10 0 0 0 0 1 device=RESISTOR -T 44900 41700 5 10 1 1 0 0 1 +T 43900 41400 5 10 1 1 0 0 1 refdes=R403 -T 44900 41200 5 10 1 1 0 0 1 +T 43900 40900 5 10 1 1 0 0 1 value=6k8 -T 44600 41400 5 10 0 1 0 0 1 +T 43600 41100 5 10 0 1 0 0 1 footprint=R025 } -C 48900 41600 1 0 0 resistor-2.sym +C 47900 41300 1 0 0 resistor-2.sym { -T 49300 41950 5 10 0 0 0 0 1 +T 48300 41650 5 10 0 0 0 0 1 device=RESISTOR -T 49000 41900 5 10 1 1 0 0 1 +T 48000 41600 5 10 1 1 0 0 1 refdes=R404 -T 49400 41900 5 10 1 1 0 0 1 +T 48400 41600 5 10 1 1 0 0 1 value=6k8 -T 48900 41600 5 10 0 1 0 0 1 +T 47900 41300 5 10 0 1 0 0 1 footprint=R025 } -C 48900 41200 1 0 0 resistor-2.sym +C 47900 40900 1 0 0 resistor-2.sym { -T 49300 41550 5 10 0 0 0 0 1 +T 48300 41250 5 10 0 0 0 0 1 device=RESISTOR -T 49000 41000 5 10 1 1 0 0 1 +T 48000 40700 5 10 1 1 0 0 1 refdes=R405 -T 49400 41000 5 10 1 1 0 0 1 +T 48400 40700 5 10 1 1 0 0 1 value=10k -T 48900 41200 5 10 0 1 0 0 1 +T 47900 40900 5 10 0 1 0 0 1 footprint=R025 } -C 48900 37100 1 0 0 resistor-2.sym +C 47900 36800 1 0 0 resistor-2.sym { -T 49300 37450 5 10 0 0 0 0 1 +T 48300 37150 5 10 0 0 0 0 1 device=RESISTOR -T 49000 36900 5 10 1 1 0 0 1 +T 48000 36600 5 10 1 1 0 0 1 refdes=R406 -T 49500 36900 5 10 1 1 0 0 1 +T 48500 36600 5 10 1 1 0 0 1 value=10k -T 48900 37100 5 10 0 1 0 0 1 +T 47900 36800 5 10 0 1 0 0 1 footprint=R025 } -C 46800 40100 1 0 0 resistor-2.sym +C 45800 39800 1 0 0 resistor-2.sym { -T 47200 40450 5 10 0 0 0 0 1 +T 46200 40150 5 10 0 0 0 0 1 device=RESISTOR -T 47000 40400 5 10 1 1 0 0 1 +T 46000 40100 5 10 1 1 0 0 1 refdes=R407 -T 47000 39900 5 10 1 1 0 0 1 +T 46000 39600 5 10 1 1 0 0 1 value=10k -T 46800 40100 5 10 0 1 0 0 1 +T 45800 39800 5 10 0 1 0 0 1 footprint=R025 } -C 46800 36000 1 0 0 resistor-2.sym +C 45800 35700 1 0 0 resistor-2.sym { -T 47200 36350 5 10 0 0 0 0 1 +T 46200 36050 5 10 0 0 0 0 1 device=RESISTOR -T 47100 36300 5 10 1 1 0 0 1 +T 46100 36000 5 10 1 1 0 0 1 refdes=R408 -T 47100 35800 5 10 1 1 0 0 1 +T 46100 35500 5 10 1 1 0 0 1 value=10k -T 46800 36000 5 10 0 1 0 0 1 +T 45800 35700 5 10 0 1 0 0 1 footprint=R025 } -C 44300 36200 1 90 0 resistor-2.sym +C 43300 35900 1 90 0 resistor-2.sym { -T 43950 36600 5 10 0 0 90 0 1 +T 42950 36300 5 10 0 0 90 0 1 device=RESISTOR -T 44000 36900 5 10 1 1 180 0 1 +T 43000 36600 5 10 1 1 180 0 1 refdes=R409 -T 43700 36500 5 10 1 1 0 0 1 +T 42700 36200 5 10 1 1 0 0 1 value=6k8 -T 44300 36200 5 10 0 1 0 0 1 +T 43300 35900 5 10 0 1 0 0 1 footprint=R025 } -C 43800 35700 1 180 0 resistor-2.sym +C 42800 35400 1 180 0 resistor-2.sym { -T 43400 35350 5 10 0 0 180 0 1 +T 42400 35050 5 10 0 0 180 0 1 device=RESISTOR -T 43500 35400 5 10 1 1 180 0 1 +T 42500 35100 5 10 1 1 180 0 1 refdes=R410 -T 43200 35800 5 10 1 1 0 0 1 +T 42200 35500 5 10 1 1 0 0 1 value=6k8 -T 43800 35700 5 10 0 1 0 0 1 +T 42800 35400 5 10 0 1 0 0 1 footprint=R025 } -C 42700 33800 1 90 0 resistor-2.sym +C 41700 33500 1 90 0 resistor-2.sym { -T 42350 34200 5 10 0 0 90 0 1 +T 41350 33900 5 10 0 0 90 0 1 device=RESISTOR -T 43100 34400 5 10 1 1 180 0 1 +T 42100 34100 5 10 1 1 180 0 1 refdes=R411 -T 42800 34000 5 10 1 1 0 0 1 +T 41800 33700 5 10 1 1 0 0 1 value=10k -T 42700 33800 5 10 0 1 0 0 1 +T 41700 33500 5 10 0 1 0 0 1 footprint=R025 } -C 53400 47400 1 180 0 resistor-2.sym +C 51100 47000 1 180 0 resistor-2.sym { -T 53000 47050 5 10 0 0 180 0 1 +T 50700 46650 5 10 0 0 180 0 1 device=RESISTOR -T 53100 47600 5 10 1 1 180 0 1 +T 50800 47200 5 10 1 1 180 0 1 refdes=R412 -T 53300 47500 5 10 1 1 0 0 1 +T 51000 47100 5 10 1 1 0 0 1 value=100k -T 53400 47400 5 10 0 1 0 0 1 +T 51100 47000 5 10 0 1 0 0 1 footprint=R025 } -C 53400 47000 1 180 0 resistor-2.sym +C 51100 46600 1 180 0 resistor-2.sym { -T 53000 46650 5 10 0 0 180 0 1 +T 50700 46250 5 10 0 0 180 0 1 device=RESISTOR -T 53100 46700 5 10 1 1 180 0 1 +T 50800 46300 5 10 1 1 180 0 1 refdes=R413 -T 53300 47000 5 10 1 1 0 0 1 +T 51000 46600 5 10 1 1 0 0 1 value=100k -T 53400 47000 5 10 0 1 0 0 1 +T 51100 46600 5 10 0 1 0 0 1 footprint=R025 } -C 53400 43500 1 180 0 resistor-2.sym +C 51100 43100 1 180 0 resistor-2.sym { -T 53000 43150 5 10 0 0 180 0 1 +T 50700 42750 5 10 0 0 180 0 1 device=RESISTOR -T 53100 43700 5 10 1 1 180 0 1 +T 50800 43300 5 10 1 1 180 0 1 refdes=R414 -T 53300 43500 5 10 1 1 0 0 1 +T 51000 43100 5 10 1 1 0 0 1 value=100k -T 53400 43500 5 10 0 1 0 0 1 +T 51100 43100 5 10 0 1 0 0 1 footprint=R025 } -C 53400 43100 1 180 0 resistor-2.sym +C 51100 42700 1 180 0 resistor-2.sym { -T 53000 42750 5 10 0 0 180 0 1 +T 50700 42350 5 10 0 0 180 0 1 device=RESISTOR -T 53100 42800 5 10 1 1 180 0 1 +T 50800 42400 5 10 1 1 180 0 1 refdes=R415 -T 53300 43100 5 10 1 1 0 0 1 +T 51000 42700 5 10 1 1 0 0 1 value=100k -T 53400 43100 5 10 0 1 0 0 1 +T 51100 42700 5 10 0 1 0 0 1 footprint=R025 } -C 56100 48600 1 180 0 resistor-2.sym +C 53800 48200 1 180 0 resistor-2.sym { -T 55700 48250 5 10 0 0 180 0 1 +T 53400 47850 5 10 0 0 180 0 1 device=RESISTOR -T 55800 48300 5 10 1 1 180 0 1 +T 53500 47900 5 10 1 1 180 0 1 refdes=R416 -T 55500 48700 5 10 1 1 0 0 1 +T 53200 48300 5 10 1 1 0 0 1 value=150k -T 56100 48600 5 10 0 1 0 0 1 +T 53800 48200 5 10 0 1 0 0 1 footprint=R025 } -C 56100 44600 1 180 0 resistor-2.sym +C 53800 44200 1 180 0 resistor-2.sym { -T 55700 44250 5 10 0 0 180 0 1 +T 53400 43850 5 10 0 0 180 0 1 device=RESISTOR -T 55800 44300 5 10 1 1 180 0 1 +T 53500 43900 5 10 1 1 180 0 1 refdes=R417 -T 55500 44700 5 10 1 1 0 0 1 +T 53200 44300 5 10 1 1 0 0 1 value=150k -T 56100 44600 5 10 0 1 0 0 1 +T 53800 44200 5 10 0 1 0 0 1 footprint=R025 } -N 43800 39700 44600 39700 4 -N 46200 41500 46200 40200 4 -N 46200 40200 46800 40200 4 -N 48900 41300 48200 41300 4 -N 48900 41700 48200 41700 4 -N 48600 41300 48600 40200 4 -N 48600 40200 47700 40200 4 -N 45500 41500 47200 41500 4 -N 44200 41100 44200 43200 4 -N 44200 41500 44600 41500 4 -N 49800 41700 50100 41700 4 -N 50100 39400 50100 41700 4 -N 49800 41300 50100 41300 4 -N 45500 39700 50100 39700 4 -N 47700 43200 48600 43200 4 -N 48600 43200 48600 41700 4 -N 46800 43200 44200 43200 4 -C 47900 41000 1 180 0 vcc-2.sym -C 48000 42800 1 180 0 vcc-minus-1.sym -N 47700 41000 47700 41100 4 -N 47700 41900 47700 42200 4 -C 46600 41800 1 0 0 capacitor-1.sym -{ -T 46800 42500 5 10 0 0 0 0 1 +N 42800 39400 43600 39400 4 +N 45200 41200 45200 39900 4 +N 45200 39900 45800 39900 4 +N 47900 41000 47200 41000 4 +N 47900 41400 47200 41400 4 +N 47600 41000 47600 39900 4 +N 47600 39900 46700 39900 4 +N 44500 41200 46200 41200 4 +N 43200 40800 43200 42900 4 +N 43200 41200 43600 41200 4 +N 48800 41400 49100 41400 4 +N 49100 39100 49100 41400 4 +N 48800 41000 49100 41000 4 +N 44500 39400 49100 39400 4 +N 46700 42900 47600 42900 4 +N 47600 42900 47600 41400 4 +N 45800 42900 43200 42900 4 +C 46900 40700 1 180 0 vcc-2.sym +C 47000 42500 1 180 0 vcc-minus-1.sym +N 46700 40700 46700 40800 4 +N 46700 41600 46700 41900 4 +C 45600 41500 1 0 0 capacitor-1.sym +{ +T 45800 42200 5 10 0 0 0 0 1 device=CAPACITOR -T 46700 42200 5 10 1 1 0 0 1 +T 45700 41900 5 10 1 1 0 0 1 refdes=C407 -T 46800 42700 5 10 0 0 0 0 1 +T 45800 42400 5 10 0 0 0 0 1 symversion=0.1 -T 47100 42200 5 10 1 1 0 0 1 +T 46100 41900 5 10 1 1 0 0 1 value=100n -T 46600 41800 5 10 0 1 0 0 1 +T 45600 41500 5 10 0 1 0 0 1 footprint=CK06_type_capacitor } -N 47500 42000 47700 42000 4 -N 46600 42000 46500 42000 4 -N 46500 42000 46500 41000 4 -N 46500 41000 47700 41000 4 -C 50000 39100 1 0 0 gnd-1.sym -C 42500 33100 1 0 0 gnd-1.sym -N 42600 33400 42600 33800 4 +N 46500 41700 46700 41700 4 +N 45600 41700 45500 41700 4 +N 45500 41700 45500 40700 4 +N 45500 40700 46700 40700 4 +C 49000 38800 1 0 0 gnd-1.sym +C 41500 32800 1 0 0 gnd-1.sym +N 41600 33100 41600 33500 4 C 39300 32600 0 0 0 title-A2.sym -N 44200 36200 44200 35600 4 -N 44200 37100 44200 38600 4 -N 44200 37400 44600 37400 4 -N 43800 35600 44600 35600 4 -N 47200 37400 45500 37400 4 -C 48000 38400 1 180 0 vcc-minus-1.sym -C 47900 37000 1 180 0 vcc-2.sym -N 45500 35600 50100 35600 4 -C 50000 35000 1 0 0 gnd-1.sym -N 50100 35300 50100 37600 4 -N 48900 37600 48200 37600 4 -N 48900 37200 48200 37200 4 -N 48600 37200 48600 36100 4 -N 48600 36100 47700 36100 4 -N 44200 38600 46800 38600 4 -N 47700 38600 48600 38600 4 -N 48600 38600 48600 37600 4 -N 49800 37600 50100 37600 4 -N 49800 37200 50100 37200 4 -N 46800 36100 46200 36100 4 -N 46200 36100 46200 37400 4 -N 44200 40200 44200 39700 4 -N 42900 39700 42600 39700 4 -N 42600 34700 42600 39700 4 -N 42600 35600 42900 35600 4 -N 41900 37400 42600 37400 4 -C 44600 38100 1 0 0 input-2.sym -{ -T 44600 38300 5 10 1 0 0 0 1 +N 43200 35900 43200 35300 4 +N 43200 36800 43200 38300 4 +N 43200 37100 43600 37100 4 +N 42800 35300 43600 35300 4 +N 46200 37100 44500 37100 4 +C 47000 38100 1 180 0 vcc-minus-1.sym +C 46900 36700 1 180 0 vcc-2.sym +N 44500 35300 49100 35300 4 +C 49000 34700 1 0 0 gnd-1.sym +N 49100 35000 49100 37300 4 +N 47900 37300 47200 37300 4 +N 47900 36900 47200 36900 4 +N 47600 36900 47600 35800 4 +N 47600 35800 46700 35800 4 +N 43200 38300 45800 38300 4 +N 46700 38300 47600 38300 4 +N 47600 38300 47600 37300 4 +N 48800 37300 49100 37300 4 +N 48800 36900 49100 36900 4 +N 45800 35800 45200 35800 4 +N 45200 35800 45200 37100 4 +N 43200 39900 43200 39400 4 +N 41900 39400 41600 39400 4 +N 41600 34400 41600 39400 4 +N 41600 35300 41900 35300 4 +N 40900 37100 41600 37100 4 +C 43600 37800 1 0 0 input-2.sym +{ +T 43600 38000 5 10 1 0 0 0 1 net=XOVER_OUT_1:1 -T 45200 38800 5 10 0 0 0 0 1 +T 44200 38500 5 10 0 0 0 0 1 device=none -T 45100 38200 5 10 1 1 0 7 1 +T 44100 37900 5 10 1 1 0 7 1 value=LOW } -C 44600 42700 1 0 0 input-2.sym +C 43600 42400 1 0 0 input-2.sym { -T 44600 42900 5 10 1 0 0 0 1 +T 43600 42600 5 10 1 0 0 0 1 net=XOVER_OUT_2:1 -T 45200 43400 5 10 0 0 0 0 1 +T 44200 43100 5 10 0 0 0 0 1 device=none -T 45100 42800 5 10 1 1 0 7 1 +T 44100 42500 5 10 1 1 0 7 1 value=HIGH } -N 46000 42800 46200 42800 4 -N 46200 42800 46200 41500 4 -N 46000 38200 46200 38200 4 -N 46200 38200 46200 37400 4 -N 55500 47100 56700 47100 4 -N 55500 43200 56700 43200 4 -N 53400 47300 54500 47300 4 -N 53400 46900 53900 46900 4 -N 53900 46900 53900 47300 4 -N 53900 47300 53900 48500 4 -N 56400 47100 56400 48500 4 -N 53400 43400 54500 43400 4 -N 53400 43000 53900 43000 4 -N 53900 43000 53900 43400 4 -N 53900 43400 53900 44500 4 -N 53900 44500 55200 44500 4 -C 50400 46800 1 0 0 input-2.sym -{ -T 50400 47000 5 10 1 0 0 0 1 +N 45000 42500 45200 42500 4 +N 45200 42500 45200 41200 4 +N 45000 37900 45200 37900 4 +N 45200 37900 45200 37100 4 +N 53200 46700 54400 46700 4 +N 53200 42800 54400 42800 4 +N 51100 46900 52200 46900 4 +N 51100 46500 51600 46500 4 +N 51600 46500 51600 46900 4 +N 51600 46900 51600 48100 4 +N 54100 46700 54100 48100 4 +N 51100 43000 52200 43000 4 +N 51100 42600 51600 42600 4 +N 51600 42600 51600 43000 4 +N 51600 43000 51600 44100 4 +N 51600 44100 52900 44100 4 +C 48100 46400 1 0 0 input-2.sym +{ +T 48100 46600 5 10 1 0 0 0 1 net=XOVER_OUT_2:1 -T 51000 47500 5 10 0 0 0 0 1 +T 48700 47100 5 10 0 0 0 0 1 device=none -T 50900 46900 5 10 1 1 0 7 1 +T 48600 46500 5 10 1 1 0 7 1 value=HIGH } -N 51800 46900 52500 46900 4 -C 50400 42900 1 0 0 input-2.sym +N 49500 46500 50200 46500 4 +C 48100 42500 1 0 0 input-2.sym { -T 50400 43100 5 10 1 0 0 0 1 +T 48100 42700 5 10 1 0 0 0 1 net=XOVER_OUT_1:1 -T 51000 43600 5 10 0 0 0 0 1 +T 48700 43200 5 10 0 0 0 0 1 device=none -T 50900 43000 5 10 1 1 0 7 1 +T 48600 42600 5 10 1 1 0 7 1 value=LOW } -N 51800 43000 52500 43000 4 -N 52500 47300 52200 47300 4 -N 52200 43400 52200 47300 4 -N 52200 43400 52500 43400 4 -N 51800 45300 52200 45300 4 -C 54800 43800 1 0 0 vcc-2.sym -C 54800 47700 1 0 0 vcc-2.sym -C 54700 42000 1 0 0 vcc-minus-1.sym -C 54700 45900 1 0 0 vcc-minus-1.sym -N 55000 47700 55000 47500 4 -N 55000 46500 55000 46700 4 -C 55200 47400 1 0 0 capacitor-1.sym -{ -T 55400 48100 5 10 0 0 0 0 1 +N 49500 42600 50200 42600 4 +N 50200 46900 49900 46900 4 +N 49900 43000 49900 46900 4 +N 49900 43000 50200 43000 4 +N 49500 44900 49900 44900 4 +C 52500 43400 1 0 0 vcc-2.sym +C 52500 47300 1 0 0 vcc-2.sym +C 52400 41600 1 0 0 vcc-minus-1.sym +C 52400 45500 1 0 0 vcc-minus-1.sym +N 52700 47300 52700 47100 4 +N 52700 46100 52700 46300 4 +C 52900 47000 1 0 0 capacitor-1.sym +{ +T 53100 47700 5 10 0 0 0 0 1 device=CAPACITOR -T 55400 47900 5 10 1 1 0 0 1 +T 53100 47500 5 10 1 1 0 0 1 refdes=C408 -T 55400 48300 5 10 0 0 0 0 1 +T 53100 47900 5 10 0 0 0 0 1 symversion=0.1 -T 55200 47400 5 10 1 1 0 0 1 +T 52900 47000 5 10 1 1 0 0 1 value=100n -T 55200 47400 5 10 0 1 0 0 1 +T 52900 47000 5 10 0 1 0 0 1 footprint=CK06_type_capacitor } -N 55000 47600 55200 47600 4 -N 56100 47600 56200 47600 4 -N 56200 47600 56200 46600 4 -N 56200 46600 55000 46600 4 -N 53900 48500 55200 48500 4 -N 56400 48500 56100 48500 4 -N 56100 44500 56400 44500 4 -N 56400 44500 56400 43200 4 -C 54100 42200 1 0 0 gnd-1.sym -C 54100 46100 1 0 0 gnd-1.sym -N 54500 46900 54200 46900 4 -N 54200 46900 54200 46400 4 -N 54500 43000 54200 43000 4 -N 54200 43000 54200 42500 4 -N 55000 42600 55000 42800 4 -N 55000 43800 55000 43600 4 -T 42900 33500 9 10 1 0 0 0 1 +N 52700 47200 52900 47200 4 +N 53800 47200 53900 47200 4 +N 53900 47200 53900 46200 4 +N 53900 46200 52700 46200 4 +N 51600 48100 52900 48100 4 +N 54100 48100 53800 48100 4 +N 53800 44100 54100 44100 4 +N 54100 44100 54100 42800 4 +C 51800 41800 1 0 0 gnd-1.sym +C 51800 45700 1 0 0 gnd-1.sym +N 52200 46500 51900 46500 4 +N 51900 46500 51900 46000 4 +N 52200 42600 51900 42600 4 +N 51900 42600 51900 42100 4 +N 52700 42200 52700 42400 4 +N 52700 43400 52700 43200 4 +T 41900 33200 9 10 1 0 0 0 1 maybe reduce to 1k6 ~ 2k T 55800 33400 9 16 1 0 0 0 1 Crossover and Bypass -T 46000 34600 9 10 1 0 0 0 1 +T 45000 34300 9 10 1 0 0 0 1 f = 1 / (2pi * RC) =~ 417Hz -C 58200 42500 1 270 0 resistor-2.sym +C 55900 42100 1 270 0 resistor-2.sym { -T 58550 42100 5 10 0 0 270 0 1 +T 56250 41700 5 10 0 0 270 0 1 device=RESISTOR -T 58500 42000 5 10 1 1 0 0 1 +T 56200 41600 5 10 1 1 0 0 1 refdes=R418 -T 58500 41800 5 10 1 1 0 0 1 +T 56200 41400 5 10 1 1 0 0 1 value=22k -T 58200 42500 5 10 0 1 0 0 1 +T 55900 42100 5 10 0 1 0 0 1 footprint=R025 } -N 58300 42700 58300 42500 4 -C 58700 40600 1 0 0 vcc-minus-1.sym -C 58000 40600 1 0 0 vcc-minus-1.sym -N 58300 41200 58300 41600 4 -C 58800 43300 1 180 0 resistor-variable-2.sym +N 56000 42300 56000 42100 4 +C 56400 40200 1 0 0 vcc-minus-1.sym +C 55700 40200 1 0 0 vcc-minus-1.sym +N 56000 40800 56000 41200 4 +C 56500 42900 1 180 0 resistor-variable-2.sym { -T 58450 43800 5 10 1 1 180 0 1 +T 56150 43400 5 10 1 1 180 0 1 refdes=R419 -T 58000 42400 5 10 0 1 180 0 1 +T 55700 42000 5 10 0 1 180 0 1 device=VARIABLE_RESISTOR -T 58100 43400 5 10 1 1 0 0 1 +T 55800 43000 5 10 1 1 0 0 1 value=100k? -T 58800 43300 5 10 0 1 0 0 1 +T 56500 42900 5 10 0 1 0 0 1 footprint=BOURNS_3296w } -N 58800 43200 59000 43200 4 -N 59000 43200 59000 41200 4 -N 58300 42600 59400 42600 4 -T 58500 41500 9 10 1 0 0 0 1 +N 56500 42800 56700 42800 4 +N 56700 42800 56700 40800 4 +N 56000 42200 57900 42200 4 +T 56200 41100 9 10 1 0 0 0 1 taper resistor -C 60800 42700 1 180 0 input-2.sym +C 55900 46000 1 270 0 resistor-2.sym { -T 61100 42400 5 10 1 0 180 0 1 -net=SEND_LOW:1 -T 60200 42000 5 10 0 0 180 0 1 -device=none -T 60300 42600 5 10 1 1 180 7 1 -value=Send LOW / Full -} -C 58200 46400 1 270 0 resistor-2.sym -{ -T 58550 46000 5 10 0 0 270 0 1 +T 56250 45600 5 10 0 0 270 0 1 device=RESISTOR -T 58500 45900 5 10 1 1 0 0 1 +T 56200 45500 5 10 1 1 0 0 1 refdes=R420 -T 58500 45700 5 10 1 1 0 0 1 +T 56200 45300 5 10 1 1 0 0 1 value=22k -T 58200 46400 5 10 0 1 0 0 1 +T 55900 46000 5 10 0 1 0 0 1 footprint=R025 } -N 58300 46600 58300 46400 4 -C 58700 44500 1 0 0 vcc-minus-1.sym -C 58000 44500 1 0 0 vcc-minus-1.sym -N 58300 45100 58300 45500 4 -C 58800 47200 1 180 0 resistor-variable-2.sym +N 56000 46200 56000 46000 4 +C 56400 44100 1 0 0 vcc-minus-1.sym +C 55700 44100 1 0 0 vcc-minus-1.sym +N 56000 44700 56000 45100 4 +C 56500 46800 1 180 0 resistor-variable-2.sym { -T 58450 47700 5 10 1 1 180 0 1 +T 56150 47300 5 10 1 1 180 0 1 refdes=R421 -T 58000 46300 5 10 0 1 180 0 1 +T 55700 45900 5 10 0 1 180 0 1 device=VARIABLE_RESISTOR -T 58100 47300 5 10 1 1 0 0 1 +T 55800 46900 5 10 1 1 0 0 1 value=100k? -T 58800 47200 5 10 0 1 0 0 1 +T 56500 46800 5 10 0 1 0 0 1 footprint=BOURNS_3296w } -N 58800 47100 59000 47100 4 -N 59000 47100 59000 45100 4 -N 58300 46500 59400 46500 4 -C 60800 46600 1 180 0 input-2.sym +N 56500 46700 56700 46700 4 +N 56700 46700 56700 44700 4 +N 56000 46100 57900 46100 4 +C 61000 46200 1 180 0 input-2.sym { -T 61200 46300 5 10 1 0 180 0 1 -net=SEND_HIGH:1 -T 60200 45900 5 10 0 0 180 0 1 +T 61400 45900 5 10 1 0 180 0 1 +net=RETURN_HIGH:1 +T 60400 45500 5 10 0 0 180 0 1 device=none -T 60300 46500 5 10 1 1 180 7 1 -value=Send HIGH / Full +T 60500 46100 5 10 1 1 180 7 1 +value=Return HIGH / Full } -T 58500 45400 9 10 1 0 0 0 1 +T 56200 45000 9 10 1 0 0 0 1 taper resistor -C 56700 43000 1 0 0 capacitor-4.sym +C 54400 42600 1 0 0 capacitor-4.sym { -T 56900 44100 5 10 0 0 0 0 1 +T 54600 43700 5 10 0 0 0 0 1 device=POLARIZED_CAPACITOR -T 56900 43500 5 10 1 1 0 0 1 +T 54600 43100 5 10 1 1 0 0 1 refdes=C409 -T 56900 43700 5 10 0 0 0 0 1 +T 54600 43300 5 10 0 0 0 0 1 symversion=0.1 -T 56700 43000 5 10 1 1 0 0 1 +T 54400 42600 5 10 1 1 0 0 1 value=1u -T 56700 43000 5 10 0 1 0 0 1 +T 54400 42600 5 10 0 1 0 0 1 footprint=RCY100P } -N 57600 43200 57900 43200 4 -C 56700 46900 1 0 0 capacitor-4.sym +N 55300 42800 55600 42800 4 +C 54400 46500 1 0 0 capacitor-4.sym { -T 56900 48000 5 10 0 0 0 0 1 +T 54600 47600 5 10 0 0 0 0 1 device=POLARIZED_CAPACITOR -T 56900 47400 5 10 1 1 0 0 1 +T 54600 47000 5 10 1 1 0 0 1 refdes=C410 -T 56900 47600 5 10 0 0 0 0 1 +T 54600 47200 5 10 0 0 0 0 1 symversion=0.1 -T 56700 46900 5 10 1 1 0 0 1 +T 54400 46500 5 10 1 1 0 0 1 value=1u -T 56700 46900 5 10 0 1 0 0 1 +T 54400 46500 5 10 0 1 0 0 1 footprint=RCY100P } -N 57600 47100 57900 47100 4 -C 53400 45400 1 180 0 resistor-2.sym +N 55300 46700 55600 46700 4 +C 51100 45000 1 180 0 resistor-2.sym { -T 53000 45050 5 10 0 0 180 0 1 +T 50700 44650 5 10 0 0 180 0 1 device=RESISTOR -T 53100 45100 5 10 1 1 180 0 1 +T 50800 44700 5 10 1 1 180 0 1 refdes=R422 -T 53300 45400 5 10 1 1 0 0 1 +T 51000 45000 5 10 1 1 0 0 1 value=100k -T 53400 45400 5 10 0 1 0 0 1 +T 51100 45000 5 10 0 1 0 0 1 footprint=R025 } -C 53600 44700 1 0 0 gnd-1.sym -N 53400 45300 53700 45300 4 -N 53700 45300 53700 45000 4 -N 52500 45300 52200 45300 4 -T 59100 43800 9 10 1 0 0 0 2 +C 51300 44300 1 0 0 gnd-1.sym +N 51100 44900 51400 44900 4 +N 51400 44900 51400 44600 4 +N 50200 44900 49900 44900 4 +T 59400 43900 9 10 1 0 0 0 2 when cross-over is disabled, the two send outputs each carry the full signal. C 41400 46500 1 0 0 input-2.sym @@ -674,3 +665,65 @@ N 44600 46100 44600 46400 4 N 44600 46400 44100 46400 4 T 54300 38200 9 10 1 0 0 0 1 TODO: add blend pots and off-board wiring +T 50200 40000 9 10 1 0 0 0 8 +TODO: +these are two fairly big buffers. If the crossover +is disabled, there's really only one signal on the +line. When the crossover is active, the bypass signal +is on ground, so no mixing is required. + +How about replacing this with two +JFET followers? +C 59000 46400 1 90 0 stereo_jack-1.sym +{ +T 57300 46695 5 10 1 1 90 0 1 +refdes=K402 +T 56700 46695 5 10 0 0 90 0 1 +device=CONNECTOR +} +C 59000 42400 1 90 0 stereo_jack-1.sym +{ +T 57300 42695 5 10 1 1 90 0 1 +refdes=K401 +T 56700 42695 5 10 0 0 90 0 1 +device=CONNECTOR +} +N 57600 42200 57600 42400 4 +N 57900 42400 58200 42400 4 +N 58500 42400 58500 42200 4 +N 58200 42200 59600 42200 4 +C 61000 42300 1 180 0 input-2.sym +{ +T 61400 42000 5 10 1 0 180 0 1 +net=RETURN_LOW:1 +T 60400 41600 5 10 0 0 180 0 1 +device=none +T 60500 42200 5 10 1 1 180 7 1 +value=Return LOW / Full +} +C 58500 41100 1 0 0 vcc-minus-1.sym +N 58800 41700 58800 42400 4 +C 58500 45300 1 0 0 vcc-minus-1.sym +N 58800 45900 58800 46400 4 +N 58500 46400 58500 46100 4 +N 58200 46100 59600 46100 4 +N 57600 46100 57600 46400 4 +N 57900 46400 58200 46400 4 +C 58400 44400 1 90 0 connector2-1.sym +{ +T 57400 44600 5 10 0 0 90 0 1 +device=CONNECTOR_2 +T 57600 44400 5 10 1 1 90 0 1 +refdes=CONN402 +T 58400 44400 5 10 0 0 0 0 1 +footprint=CONNECTOR 2 1 +} +C 58400 40500 1 90 0 connector2-1.sym +{ +T 57400 40700 5 10 0 0 90 0 1 +device=CONNECTOR_2 +T 57600 40500 5 10 1 1 90 0 1 +refdes=CONN401 +T 58400 40500 5 10 0 0 0 0 1 +footprint=CONNECTOR 2 1 +} |