print addresses of registers as names
[wavedrum/sharc-disassembler.git] / SHARC / Types.hs
1 {-
2 This file is part of shark-disassembler.
3
4 Copyright (C) 2014 Ricardo Wurmus
5
6 This program is free software: you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation, either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>.
18 -}
19
20 module SHARC.Types where
21
22 import SHARC.Word48
23
24 import Data.Word
25 import Data.Map (fromList, findWithDefault)
26 import Data.Bits ((.&.), (.|.), xor, testBit, shift, shiftR)
27 import Text.Printf (printf)
28
29 -- TODO: check other register assigments as well! They may need to be shifted first.
30
31
32 data Cond = Cond Word8
33 -- the 5 bit condition codes are at an odd position in the byte, so we
34 -- have to cut them out [ 00111110 ]
35 -- TODO: valid values go from 0 to 31, restrict!
36 mkCond :: Word48 -> Cond
37 mkCond w = Cond $ w64 `cutMask` 0x003E00000000
38 where
39 w64 = word48ToWord64 w
40
41 data TermCond = TermCond Word8
42 -- the 5 bit condition codes are at an odd position in the byte, so we
43 -- have to cut them out [ 00111110 ]
44 -- TODO: valid values go from 0 to 31, restrict!
45 mkTermCond :: Word48 -> TermCond
46 mkTermCond w = TermCond $ w64 `cutMask` 0x003E00000000
47 where
48 w64 = word48ToWord64 w
49
50 -- from table 1-4 (isr.pdf) "Conditional Execution Codes Summary"
51 condCodes = [
52 "EQ",
53 "NE",
54 "GT",
55 "LT",
56 "GE",
57 "LE",
58 "AC",
59 "NOT AC",
60 "AV",
61 "NOT AV",
62 "MV",
63 "NOT MV",
64 "MS",
65 "NOT MS",
66 "SV",
67 "NOT SV",
68 "SZ",
69 "NOT SZ",
70 "TF",
71 "NOT TF",
72 "FLAG0_IN",
73 "NOT FLAG0_IN",
74 "FLAG1_IN",
75 "NOT FLAG1_IN",
76 "FLAG2_IN",
77 "NOT FLAG2_IN",
78 "FLAG3_IN",
79 "NOT FLAG3_IN",
80 "BM",
81 "NOT BM",
82 "NOT ICE",
83 "TRUE" ]
84
85 condCodeMap = fromList $ zip [0..] condCodes
86 termCodeMap = fromList $ zip [0..] $ (init . init) condCodes ++ ["LCE", "FOREVER"]
87
88 instance Show Cond where
89 -- do not print if code is "TRUE" (31)
90 show (Cond n) = if n == 31 then ""
91 else "IF " ++ findWithDefault (printf "0x%02X" n) n condCodeMap ++ " "
92
93 instance Show TermCond where
94 show (TermCond n) = findWithDefault (printf "0x%02X" n) n termCodeMap
95
96 -- TODO: see page 10-30 in programming reference for register opcodes
97
98 -- TODO: Ireg is just a special case Ureg. Unify types!
99 data Ireg = Ireg Word8
100 mkIreg :: Word8 -> Ireg
101 mkIreg n = Ireg $ n .&. 0x07
102 instance Show Ireg where
103 show (Ireg n) = printf "I%d" n
104
105 -- TODO: Mreg is just a special case Ureg. Unify types!
106 data Mreg = Mreg Word8
107 mkMreg :: Word8 -> Mreg
108 mkMreg n = Mreg $ n .&. 0x07
109 instance Show Mreg where
110 show (Mreg n) = printf "M%d" n
111
112 -- TODO: see table 1-8 and 1-11 in isr.pdf
113 -- 7 bit universal register
114 data Ureg = Ureg Word8
115 mkUreg :: Word8 -> Ureg
116 mkUreg n = Ureg $ n .&. 0x7F
117 instance Show Ureg where
118 show (Ureg n) = case prefix of
119 0x00 -> format0000 stripped
120 0x10 -> format0001 stripped
121 0x20 -> format0010 stripped
122 0x30 -> format0011 stripped
123 0x40 -> format0100 stripped
124 0x50 -> format0101 stripped
125 0x60 -> names0110 !! fromIntegral stripped
126 0x70 -> names0111 !! fromIntegral stripped
127 _ -> printf "0x%02X" n
128 where
129 prefix = n .&. 0xF0
130 stripped = n .&. 0x0F
131 format0000 x = 'R' : show x -- TODO: depends on whether it's DREG or CDREG
132 format0001 x = 'I' : show x
133 format0010 x = 'M' : show x
134 format0011 x = 'L' : show x
135 format0100 x = 'B' : show x
136 format0101 x = 'S' : show x -- TODO: depends on whether it's DREG or CDREG
137 names0110 = [ "FADDR" -- these are names for registers with prefix 0110
138 , "DADDR"
139 , ""
140 , "PC"
141 , "PCSTK"
142 , "PCSTKP"
143 , "LADDR"
144 , "CURLCNTR"
145 , "LCNTR"
146 , "EMUCLK"
147 , "EMUCLK2"
148 , "PX"
149 , "PX1"
150 , "PX2"
151 , "TPERIOD"
152 , "TCOUNT"
153 ]
154 names0111 = [ "USTAT1"
155 , "USTAT2"
156 , "MODE1"
157 , "MMASK"
158 , "MODE2"
159 , "FLAGS"
160 , "ASTATx"
161 , "ASTATy"
162 , "STKYx"
163 , "STKYy"
164 , "IRPTL"
165 , "IMASK"
166 , "IMASKP"
167 , "LRPTL"
168 , "USTAT3"
169 , "USTAT4"
170 ]
171
172
173 -- TODO: Sreg is just a special case Ureg. Unify types!
174 -- 4 bit system register
175 data Sreg = Sreg Word8
176 mkSreg :: Word8 -> Sreg
177 mkSreg n = Sreg $ n .&. 0x0F
178 instance Show Sreg where
179 show (Sreg n) = xnames !! fromIntegral n -- TODO: distinguish between PEx and PEy names!
180 where xnames = [ "USTAT1"
181 , "USTAT2"
182 , "MODE1"
183 , "MMASK"
184 , "MODE2"
185 , "FLAGS"
186 , "ASTATx"
187 , "ASTATy"
188 , "STKYx"
189 , "STKYy"
190 , "IRPTL"
191 , "IMASK"
192 , "IMASKP"
193 , "LRPTL"
194 , "USTAT3"
195 , "USTAT4"
196 ]
197 ynames = [ "USTAT2"
198 , "USTAT1"
199 , "MODE1"
200 , "MMASK"
201 , "MODE2"
202 , "FLAGS"
203 , "ASTATy"
204 , "ASTATx"
205 , "STKYy"
206 , "STKYx"
207 , "IRPTL"
208 , "IMASK"
209 , "IMASKP"
210 , "LRPTL"
211 , "USTAT4"
212 , "USTAT3"
213 ]
214
215 -- TODO: Dreg is just a special case Ureg. Unify types!
216 -- 4 bit data register
217 data Dreg = Dreg Word8
218 mkDreg :: Word8 -> Dreg
219 mkDreg n = Dreg $ n .&. 0x0F
220 instance Show Dreg where
221 show (Dreg n) = printf "R%d" n
222 -- TODO: according to the docs this is R15-R0 *and* F15-F0
223 -- TODO: if this is a CDREG, it should be S, not R
224
225
226 -- I/O processor register address memory map
227 registerMemoryMap = fromList [ (0x30020,"EEMUIN")
228 , (0x30021,"EEMUSTAT")
229 , (0x30022,"EEMUOUT")
230 , (0x30023,"OSPID")
231 , (0x30024,"SYSCTL")
232 , (0x30025,"BRKCTL")
233 , (0x30026,"REVPID")
234 , (0x300a0,"PSA1S")
235 , (0x300a1,"PSA1E")
236 , (0x300a2,"PSA2S")
237 , (0x300a3,"PSA2E")
238 , (0x300a4,"PSA3S")
239 , (0x300a5,"PSA3E")
240 , (0x300a6,"PSA4S")
241 , (0x300a7,"PSA4E")
242 , (0x300b2,"DMA1S")
243 , (0x300b3,"DMA1E")
244 , (0x300b4,"DMA2S")
245 , (0x300b5,"DMA2E")
246 , (0x300b6,"D1IC")
247 , (0x300b7,"D1ID")
248 , (0x300b8,"PMDAS")
249 , (0x300b9,"PMDAE")
250 , (0x300bc,"D2IC")
251 , (0x300bd,"D2ID")
252 , (0x300ae,"EMUN")
253 , (0x1800,"SDCTL")
254 , (0x1801,"EPCTL")
255 , (0x1802,"SDRRC")
256 , (0x1803,"SDSTAT")
257 , (0x180d,"BMAX")
258 , (0x180e,"BCNT")
259 , (0x180f,"SYSTAT")
260 , (0x1804,"AMICTL0")
261 , (0x1805,"AMICTL1")
262 , (0x1806,"AMICTL2")
263 , (0x1807,"AMICTL3")
264 , (0x180a,"AMISTAT")
265 , (0x180b,"DMAC0")
266 , (0x180c,"DMAC1")
267 , (0x1820,"EIEP0")
268 , (0x1821,"EMEP0")
269 , (0x1822,"ECEP0")
270 , (0x1823,"IIEP0")
271 , (0x1824,"IMEP0")
272 , (0x1825,"ICEP0")
273 , (0x1825,"CEP0")
274 , (0x1826,"CPEP0")
275 , (0x1827,"EBEP0")
276 , (0x1828,"TPEP0")
277 , (0x1829,"ELEP0")
278 , (0x182c,"DFEP0")
279 , (0x182d,"TFEP0")
280 , (0x1830,"EIEP1")
281 , (0x1831,"EMEP1")
282 , (0x1832,"ECEP1")
283 , (0x1833,"IIEP1")
284 , (0x1834,"IMEP1")
285 , (0x1835,"ICEP1")
286 , (0x1835,"CEP1")
287 , (0x1836,"CPEP1")
288 , (0x1837,"EBEP1")
289 , (0x1838,"TPEP1")
290 , (0x1839,"ELEP1")
291 , (0x183c,"DFEP1")
292 , (0x183d,"TFEP1")
293 , (0x2300,"SPERRSTAT")
294 , (0xc00,"SPCTL0")
295 , (0xc01,"SPCTL1")
296 , (0xc02,"DIV0")
297 , (0xc03,"DIV1")
298 , (0xc04,"SPMCTL0")
299 , (0xc05,"MT0CS0")
300 , (0xc06,"MT0CS1")
301 , (0xc07,"MT0CS2")
302 , (0xc08,"MT0CS3")
303 , (0xc09,"MR1CS0")
304 , (0xc0A,"MR1CS1")
305 , (0xc0B,"MR1CS2")
306 , (0xc0C,"MR1CS3")
307 , (0xc0D,"MT0CCS0")
308 , (0xc0E,"MT0CCS1")
309 , (0xc0F,"MT0CCS2")
310 , (0xc10,"MT0CCS3")
311 , (0xc11,"MR1CCS0")
312 , (0xc12,"MR1CCS1")
313 , (0xc13,"MR1CCS2")
314 , (0xc14,"MR1CCS3")
315 , (0xc15,"SPCNT0")
316 , (0xc16,"SPCNT1")
317 , (0xc17,"SPMCTL1")
318 , (0xc18,"SPERRCTL0")
319 , (0xc19,"SPERRCTL1")
320 , (0xc05,"SP0CS0")
321 , (0xc06,"SP0CS1")
322 , (0xc07,"SP0CS2")
323 , (0xc08,"SP0CS3")
324 , (0xc09,"SP1CS0")
325 , (0xc0A,"SP1CS1")
326 , (0xc0B,"SP1CS2")
327 , (0xc0C,"SP1CS3")
328 , (0xc0D,"SP0CCS0")
329 , (0xc0E,"SP0CCS1")
330 , (0xc0F,"SP0CCS2")
331 , (0xc10,"SP0CCS3")
332 , (0xc11,"SP1CCS0")
333 , (0xc12,"SP1CCS1")
334 , (0xc13,"SP1CCS2")
335 , (0xc14,"SP1CCS3")
336 , (0xc40,"IISP0A")
337 , (0xc41,"IMSP0A")
338 , (0xc42,"CSP0A")
339 , (0xc43,"CPSP0A")
340 , (0xc44,"IISP0B")
341 , (0xc45,"IMSP0B")
342 , (0xc46,"CSP0B")
343 , (0xc47,"CPSP0B")
344 , (0xc48,"IISP1A")
345 , (0xc49,"IMSP1A")
346 , (0xc4A,"CSP1A")
347 , (0xc4B,"CPSP1A")
348 , (0xc4C,"IISP1B")
349 , (0xc4D,"IMSP1B")
350 , (0xc4E,"CSP1B")
351 , (0xc4F,"CPSP1B")
352 , (0xc60,"TXSP0A")
353 , (0xc61,"RXSP0A")
354 , (0xc62,"TXSP0B")
355 , (0xc63,"RXSP0B")
356 , (0xc64,"TXSP1A")
357 , (0xc65,"RXSP1A")
358 , (0xc66,"TXSP1B")
359 , (0xc67,"RXSP1B")
360 , (0x400,"SPCTL2")
361 , (0x401,"SPCTL3")
362 , (0x402,"DIV2")
363 , (0x403,"DIV3")
364 , (0x404,"SPMCTL2")
365 , (0x405,"MT2CS0")
366 , (0x406,"MT2CS1")
367 , (0x407,"MT2CS2")
368 , (0x408,"MT2CS3")
369 , (0x409,"MR3CS0")
370 , (0x40A,"MR3CS1")
371 , (0x40B,"MR3CS2")
372 , (0x40C,"MR3CS3")
373 , (0x40D,"MT2CCS0")
374 , (0x40E,"MT2CCS1")
375 , (0x40F,"MT2CCS2")
376 , (0x410,"MT2CCS3")
377 , (0x411,"MR3CCS0")
378 , (0x412,"MR3CCS1")
379 , (0x413,"MR3CCS2")
380 , (0x414,"MR3CCS3")
381 , (0x415,"SPCNT2")
382 , (0x416,"SPCNT3")
383 , (0x417,"SPMCTL3")
384 , (0x418,"SPERRCTL2")
385 , (0x419,"SPERRCTL3")
386 , (0x405,"SP2CS0")
387 , (0x406,"SP2CS1")
388 , (0x407,"SP2CS2")
389 , (0x408,"SP2CS3")
390 , (0x409,"SP3CS0")
391 , (0x40A,"SP3CS1")
392 , (0x40B,"SP3CS2")
393 , (0x40C,"SP3CS3")
394 , (0x40D,"SP2CCS0")
395 , (0x40E,"SP2CCS1")
396 , (0x40F,"SP2CCS2")
397 , (0x410,"SP2CCS3")
398 , (0x411,"SP3CCS0")
399 , (0x412,"SP3CCS1")
400 , (0x413,"SP3CCS2")
401 , (0x414,"SP3CCS3")
402 , (0x440,"IISP2A")
403 , (0x441,"IMSP2A")
404 , (0x442,"CSP2A")
405 , (0x443,"CPSP2A")
406 , (0x444,"IISP2B")
407 , (0x445,"IMSP2B")
408 , (0x446,"CSP2B")
409 , (0x447,"CPSP2B")
410 , (0x448,"IISP3A")
411 , (0x449,"IMSP3A")
412 , (0x44A,"CSP3A")
413 , (0x44B,"CPSP3A")
414 , (0x44C,"IISP3B")
415 , (0x44D,"IMSP3B")
416 , (0x44E,"CSP3B")
417 , (0x44F,"CPSP3B")
418 , (0x460,"TXSP2A")
419 , (0x461,"RXSP2A")
420 , (0x462,"TXSP2B")
421 , (0x463,"RXSP2B")
422 , (0x464,"TXSP3A")
423 , (0x465,"RXSP3A")
424 , (0x466,"TXSP3B")
425 , (0x467,"RXSP3B")
426 , (0x800,"SPCTL4")
427 , (0x801,"SPCTL5")
428 , (0x802,"DIV4")
429 , (0x803,"DIV5")
430 , (0x804,"SPMCTL4")
431 , (0x805,"MT4CS0")
432 , (0x806,"MT4CS1")
433 , (0x807,"MT4CS2")
434 , (0x808,"MT4CS3")
435 , (0x809,"MR5CS0")
436 , (0x80A,"MR5CS1")
437 , (0x80B,"MR5CS2")
438 , (0x80C,"MR5CS3")
439 , (0x80D,"MT4CCS0")
440 , (0x80E,"MT4CCS1")
441 , (0x80F,"MT4CCS2")
442 , (0x810,"MT4CCS3")
443 , (0x811,"MR5CCS0")
444 , (0x812,"MR5CCS1")
445 , (0x813,"MR5CCS2")
446 , (0x814,"MR5CCS3")
447 , (0x815,"SPCNT4")
448 , (0x816,"SPCNT5")
449 , (0x817,"SPMCTL5")
450 , (0x818,"SPERRCTL4")
451 , (0x819,"SPERRCTL5")
452 , (0x805,"SP4CS0")
453 , (0x806,"SP4CS1")
454 , (0x807,"SP4CS2")
455 , (0x808,"SP4CS3")
456 , (0x809,"SP5CS0")
457 , (0x80A,"SP5CS1")
458 , (0x80B,"SP5CS2")
459 , (0x80C,"SP5CS3")
460 , (0x80D,"SP4CCS0")
461 , (0x80E,"SP4CCS1")
462 , (0x80F,"SP4CCS2")
463 , (0x810,"SP4CCS3")
464 , (0x811,"SP5CCS0")
465 , (0x812,"SP5CCS1")
466 , (0x813,"SP5CCS2")
467 , (0x814,"SP5CCS3")
468 , (0x840,"IISP4A")
469 , (0x841,"IMSP4A")
470 , (0x842,"CSP4A")
471 , (0x843,"CPSP4A")
472 , (0x844,"IISP4B")
473 , (0x845,"IMSP4B")
474 , (0x846,"CSP4B")
475 , (0x847,"CPSP4B")
476 , (0x848,"IISP5A")
477 , (0x849,"IMSP5A")
478 , (0x84A,"CSP5A")
479 , (0x84B,"CPSP5A")
480 , (0x84C,"IISP5B")
481 , (0x84D,"IMSP5B")
482 , (0x84E,"CSP5B")
483 , (0x84F,"CPSP5B")
484 , (0x860,"TXSP4A")
485 , (0x861,"RXSP4A")
486 , (0x862,"TXSP4B")
487 , (0x863,"RXSP4B")
488 , (0x864,"TXSP5A")
489 , (0x865,"RXSP5A")
490 , (0x866,"TXSP5B")
491 , (0x867,"RXSP5B")
492 , (0x4800,"SPCTL6")
493 , (0x4801,"SPCTL7")
494 , (0x4802,"DIV6")
495 , (0x4803,"DIV7")
496 , (0x4804,"SPMCTL6")
497 , (0x4805,"MT6CS0")
498 , (0x4806,"MT6CS1")
499 , (0x4807,"MT6CS2")
500 , (0x4808,"MT6CS3")
501 , (0x4809,"MR7CS0")
502 , (0x480A,"MR7CS1")
503 , (0x480B,"MR7CS2")
504 , (0x480C,"MR7CS3")
505 , (0x480D,"MT6CCS0")
506 , (0x480E,"MT6CCS1")
507 , (0x480F,"MT6CCS2")
508 , (0x4810,"MT6CCS3")
509 , (0x4811,"MR7CCS0")
510 , (0x4812,"MR7CCS1")
511 , (0x4813,"MR7CCS2")
512 , (0x4814,"MR7CCS3")
513 , (0x4815,"SPCNT6")
514 , (0x4816,"SPCNT7")
515 , (0x4817,"SPMCTL7")
516 , (0x4818,"SPERRCTL6")
517 , (0x4819,"SPERRCTL7")
518 , (0x4805,"SP6CS0")
519 , (0x4806,"SP6CS1")
520 , (0x4807,"SP6CS2")
521 , (0x4808,"SP6CS3")
522 , (0x4809,"SP7CS0")
523 , (0x480A,"SP7CS1")
524 , (0x480B,"SP7CS2")
525 , (0x480C,"SP7CS3")
526 , (0x480D,"SP6CCS0")
527 , (0x480E,"SP6CCS1")
528 , (0x480F,"SP6CCS2")
529 , (0x4810,"SP6CCS3")
530 , (0x4811,"SP7CCS0")
531 , (0x4812,"SP7CCS1")
532 , (0x4813,"SP7CCS2")
533 , (0x4814,"SP7CCS3")
534 , (0x4840,"IISP6A")
535 , (0x4841,"IMSP6A")
536 , (0x4842,"CSP6A")
537 , (0x4843,"CPSP6A")
538 , (0x4844,"IISP6B")
539 , (0x4845,"IMSP6B")
540 , (0x4846,"CSP6B")
541 , (0x4847,"CPSP6B")
542 , (0x4848,"IISP7A")
543 , (0x4849,"IMSP7A")
544 , (0x484A,"CSP7A")
545 , (0x484B,"CPSP7A")
546 , (0x484C,"IISP7B")
547 , (0x484D,"IMSP7B")
548 , (0x484E,"CSP7B")
549 , (0x484F,"CPSP7B")
550 , (0x4860,"TXSP6A")
551 , (0x4861,"RXSP6A")
552 , (0x4862,"TXSP6B")
553 , (0x4863,"RXSP6B")
554 , (0x4864,"TXSP7A")
555 , (0x4865,"RXSP7A")
556 , (0x4866,"TXSP7B")
557 , (0x4867,"RXSP7B")
558 , (0x1000,"SPICTL")
559 , (0x1001,"SPIFLG")
560 , (0x1002,"SPISTAT")
561 , (0x1003,"TXSPI")
562 , (0x1004,"RXSPI")
563 , (0x1005,"SPIBAUD")
564 , (0x1006,"RXSPI_SHADOW")
565 , (0x1080,"IISPI")
566 , (0x1081,"IMSPI")
567 , (0x1082,"CSPI")
568 , (0x1083,"CPSPI")
569 , (0x1084,"SPIDMAC")
570 , (0x2800,"SPICTLB")
571 , (0x2801,"SPIFLGB")
572 , (0x2802,"SPISTATB")
573 , (0x2803,"TXSPIB")
574 , (0x2804,"RXSPIB")
575 , (0x2805,"SPIBAUDB")
576 , (0x2806,"RXSPIB_SHADOW")
577 , (0x2880,"IISPIB")
578 , (0x2881,"IMSPIB")
579 , (0x2882,"CSPIB")
580 , (0x2883,"CPSPIB")
581 , (0x2884,"SPIDMACB")
582 , (0x1400,"TMSTAT")
583 , (0x1400,"TM0STAT")
584 , (0x1401,"TM0CTL")
585 , (0x1402,"TM0CNT")
586 , (0x1403,"TM0PRD")
587 , (0x1404,"TM0W")
588 , (0x1408,"TM1STAT")
589 , (0x1409,"TM1CTL")
590 , (0x140a,"TM1CNT")
591 , (0x140b,"TM1PRD")
592 , (0x140c,"TM1W")
593 , (0x1410,"TM2STAT")
594 , (0x1411,"TM2CTL")
595 , (0x1412,"TM2CNT")
596 , (0x1413,"TM2PRD")
597 , (0x1414,"TM2W")
598 , (0x2000,"PMCTL")
599 , (0x20FF,"ROMID")
600 , (0x2400,"IDP_DMA_I0")
601 , (0x2401,"IDP_DMA_I1")
602 , (0x2402,"IDP_DMA_I2")
603 , (0x2403,"IDP_DMA_I3")
604 , (0x2404,"IDP_DMA_I4")
605 , (0x2405,"IDP_DMA_I5")
606 , (0x2406,"IDP_DMA_I6")
607 , (0x2407,"IDP_DMA_I7")
608 , (0x2408,"IDP_DMA_I0A")
609 , (0x2409,"IDP_DMA_I1A")
610 , (0x240a,"IDP_DMA_I2A")
611 , (0x240b,"IDP_DMA_I3A")
612 , (0x240c,"IDP_DMA_I4A")
613 , (0x240d,"IDP_DMA_I5A")
614 , (0x240e,"IDP_DMA_I6A")
615 , (0x240f,"IDP_DMA_I7A")
616 , (0x2418,"IDP_DMA_I0B")
617 , (0x2419,"IDP_DMA_I1B")
618 , (0x241a,"IDP_DMA_I2B")
619 , (0x241b,"IDP_DMA_I3B")
620 , (0x241c,"IDP_DMA_I4B")
621 , (0x241d,"IDP_DMA_I5B")
622 , (0x241e,"IDP_DMA_I6B")
623 , (0x241f,"IDP_DMA_I7B")
624 , (0x2410,"IDP_DMA_M0")
625 , (0x2411,"IDP_DMA_M1")
626 , (0x2412,"IDP_DMA_M2")
627 , (0x2413,"IDP_DMA_M3")
628 , (0x2414,"IDP_DMA_M4")
629 , (0x2415,"IDP_DMA_M5")
630 , (0x2416,"IDP_DMA_M6")
631 , (0x2417,"IDP_DMA_M7")
632 , (0x2420,"IDP_DMA_C0")
633 , (0x2421,"IDP_DMA_C1")
634 , (0x2422,"IDP_DMA_C2")
635 , (0x2423,"IDP_DMA_C3")
636 , (0x2424,"IDP_DMA_C4")
637 , (0x2425,"IDP_DMA_C5")
638 , (0x2426,"IDP_DMA_C6")
639 , (0x2427,"IDP_DMA_C7")
640 , (0x2428,"IDP_DMA_PC0")
641 , (0x2429,"IDP_DMA_PC1")
642 , (0x242a,"IDP_DMA_PC2")
643 , (0x242b,"IDP_DMA_PC3")
644 , (0x242c,"IDP_DMA_PC4")
645 , (0x242d,"IDP_DMA_PC5")
646 , (0x242e,"IDP_DMA_PC6")
647 , (0x242f,"IDP_DMA_PC7")
648 , (0x2430,"SRU_CLK0")
649 , (0x2431,"SRU_CLK1")
650 , (0x2432,"SRU_CLK2")
651 , (0x2433,"SRU_CLK3")
652 , (0x2434,"SRU_CLK4")
653 , (0x2435,"SRU_CLK5")
654 , (0x2440,"SRU_DAT0")
655 , (0x2441,"SRU_DAT1")
656 , (0x2442,"SRU_DAT2")
657 , (0x2443,"SRU_DAT3")
658 , (0x2444,"SRU_DAT4")
659 , (0x2445,"SRU_DAT5")
660 , (0x2446,"SRU_DAT6")
661 , (0x2450,"SRU_FS0")
662 , (0x2451,"SRU_FS1")
663 , (0x2452,"SRU_FS2")
664 , (0x2453,"SRU_FS3")
665 , (0x2454,"SRU_FS4")
666 , (0x2460,"SRU_PIN0")
667 , (0x2461,"SRU_PIN1")
668 , (0x2462,"SRU_PIN2")
669 , (0x2463,"SRU_PIN3")
670 , (0x2464,"SRU_PIN4")
671 , (0x2470,"SRU_EXT_MISCA")
672 , (0x2471,"SRU_EXT_MISCB")
673 , (0x2478,"SRU_PBEN0")
674 , (0x2479,"SRU_PBEN1")
675 , (0x247A,"SRU_PBEN2")
676 , (0x247B,"SRU_PBEN3")
677 , (0x247D,"DAI_PIN_PULLUP")
678 , (0x2480,"DAI_IRPTL_FE")
679 , (0x2480,"DAI_IMASK_FE")
680 , (0x2481,"DAI_IRPTL_RE")
681 , (0x2481,"DAI_IMASK_RE")
682 , (0x2484,"DAI_IRPTL_PRI")
683 , (0x2488,"DAI_IRPTL_H")
684 , (0x2489,"DAI_IRPTL_L")
685 , (0x248C,"DAI_IRPTL_HS")
686 , (0x248D,"DAI_IRPTL_LS")
687 , (0x24B0,"IDP_CTL")
688 , (0x24B0,"IDP_CTL0")
689 , (0x24B1,"IDP_PP_CTL")
690 , (0x24B2,"IDP_CTL1")
691 , (0x24B8,"DAI_STAT")
692 , (0x24B8,"DAI_STAT0")
693 , (0x24B9,"DAI_PIN_STAT")
694 , (0x24BA,"DAI_STAT1")
695 , (0x24D0,"IDP_FIFO")
696 , (0x1C00,"SRU2_INPUT0")
697 , (0x1C01,"SRU2_INPUT1")
698 , (0x1C02,"SRU2_INPUT2")
699 , (0x1C03,"SRU2_INPUT3")
700 , (0x1C04,"SRU2_INPUT4")
701 , (0x1C05,"SRU2_INPUT5")
702 , (0x1C10,"SRU2_PIN0")
703 , (0x1C11,"SRU2_PIN1")
704 , (0x1C12,"SRU2_PIN2")
705 , (0x1C20,"SRU2_PBEN0")
706 , (0x1C21,"SRU2_PBEN1")
707 , (0x1C22,"SRU2_PBEN2")
708 , (0x1C30,"DPI_PIN_PULLUP")
709 , (0x1C31,"DPI_PIN_STAT")
710 , (0x1C32,"DPI_IRPTL")
711 , (0x1C33,"DPI_IRPTL_SH")
712 , (0x1C34,"DPI_IRPTL_FE")
713 , (0x1C34,"DPI_IMASK_FE")
714 , (0x1C35,"DPI_IRPTL_RE")
715 , (0x1C35,"DPI_IMASK_RE")
716 , (0x24C0,"PCG_CTLA0")
717 , (0x24C1,"PCG_CTLA1")
718 , (0x24C2,"PCG_CTLB0")
719 , (0x24C3,"PCG_CTLB1")
720 , (0x24C4,"PCG_PW")
721 , (0x24C5,"PCG_SYNC")
722 , (0x24C4,"PCG_PW1")
723 , (0x24C5,"PCG_SYNC1")
724 , (0x24C6,"PCG_CTLC0")
725 , (0x24C7,"PCG_CTLC1")
726 , (0x24C8,"PCG_CTLD0")
727 , (0x24C9,"PCG_CTLD1")
728 , (0x24CA,"PCG_PW2")
729 , (0x24CB,"PCG_SYNC2")
730 , (0x2200,"PICR0")
731 , (0x2201,"PICR1")
732 , (0x2202,"PICR2")
733 , (0x2203,"PICR3")
734 , (0x2c01,"MTMCTL")
735 , (0x2c10,"IIMTMW")
736 , (0x2c11,"IIMTMR")
737 , (0x2c0e,"IMMTMW")
738 , (0x2c0f,"IMMTMR")
739 , (0x2c16,"CMTMW")
740 , (0x2c17,"CMTMR")
741 , (0x3800,"PWMGCTL")
742 , (0x3801,"PWMGSTAT")
743 , (0x3000,"PWMCTL0")
744 , (0x3001,"PWMSTAT0")
745 , (0x3002,"PWMPERIOD0")
746 , (0x3003,"PWMDT0")
747 , (0x3005,"PWMA0")
748 , (0x3006,"PWMB0")
749 , (0x3008,"PWMSEG0")
750 , (0x300A,"PWMAL0")
751 , (0x300B,"PWMBL0")
752 , (0x300E,"PWMDBG0")
753 , (0x300F,"PWMPOL0")
754 , (0x3010,"PWMCTL1")
755 , (0x3011,"PWMSTAT1")
756 , (0x3012,"PWMPERIOD1")
757 , (0x3013,"PWMDT1")
758 , (0x3015,"PWMA1")
759 , (0x3016,"PWMB1")
760 , (0x3018,"PWMSEG1")
761 , (0x301A,"PWMAL1")
762 , (0x301B,"PWMBL1")
763 , (0x301E,"PWMDBG1")
764 , (0x301F,"PWMPOL1")
765 , (0x3400,"PWMCTL2")
766 , (0x3401,"PWMSTAT2")
767 , (0x3402,"PWMPERIOD2")
768 , (0x3403,"PWMDT2")
769 , (0x3405,"PWMA2")
770 , (0x3406,"PWMB2")
771 , (0x3408,"PWMSEG2")
772 , (0x340A,"PWMAL2")
773 , (0x340B,"PWMBL2")
774 , (0x340E,"PWMDBG2")
775 , (0x340F,"PWMPOL2")
776 , (0x3410,"PWMCTL3")
777 , (0x3411,"PWMSTAT3")
778 , (0x3412,"PWMPERIOD3")
779 , (0x3413,"PWMDT3")
780 , (0x3415,"PWMA3")
781 , (0x3416,"PWMB3")
782 , (0x3418,"PWMSEG3")
783 , (0x341A,"PWMAL3")
784 , (0x341B,"PWMBL3")
785 , (0x341E,"PWMDBG3")
786 , (0x341F,"PWMPOL3")
787 , (0x3c00,"UART0THR")
788 , (0x3c00,"UART0RBR")
789 , (0x3c00,"UART0DLL")
790 , (0x3c01,"UART0IER")
791 , (0x3c01,"UART0DLH")
792 , (0x3c02,"UART0IIR")
793 , (0x3c03,"UART0LCR")
794 , (0x3c04,"UART0MODE")
795 , (0x3c05,"UART0LSR")
796 , (0x3c07,"UART0SCR")
797 , (0x3c08,"UART0RBRSH")
798 , (0x3c09,"UART0IIRSH")
799 , (0x3c0a,"UART0LSRSH")
800 , (0x3e00,"IIUART0RX")
801 , (0x3e01,"IMUART0RX")
802 , (0x3e02,"CUART0RX")
803 , (0x3e03,"CPUART0RX")
804 , (0x3e04,"UART0RXCTL")
805 , (0x3e05,"UART0RXSTAT")
806 , (0x3f00,"IIUART0TX")
807 , (0x3f01,"IMUART0TX")
808 , (0x3f02,"CUART0TX")
809 , (0x3f03,"CPUART0TX")
810 , (0x3f04,"UART0TXCTL")
811 , (0x3f05,"UART0TXSTAT")
812 , (0x4000,"UART1THR")
813 , (0x4000,"UART1RBR")
814 , (0x4000,"UART1DLL")
815 , (0x4001,"UART1IER")
816 , (0x4001,"UART1DLH")
817 , (0x4002,"UART1IIR")
818 , (0x4003,"UART1LCR")
819 , (0x4004,"UART1MODE")
820 , (0x4005,"UART1LSR")
821 , (0x4007,"UART1SCR")
822 , (0x4008,"UART1RBRSH")
823 , (0x4009,"UART1IIRSH")
824 , (0x400a,"UART1LSRSH")
825 , (0x4200,"IIUART1RX")
826 , (0x4201,"IMUART1RX")
827 , (0x4202,"CUART1RX")
828 , (0x4203,"CPUART1RX")
829 , (0x4204,"UART1RXCTL")
830 , (0x4205,"UART1RXSTAT")
831 , (0x4300,"IIUART1TX")
832 , (0x4301,"IMUART1TX")
833 , (0x4302,"CUART1TX")
834 , (0x4303,"CPUART1TX")
835 , (0x4304,"UART1TXCTL")
836 , (0x4305,"UART1TXSTAT")
837 , (0x4400,"TWIDIV")
838 , (0x4404,"TWIMITR")
839 , (0x4408,"TWISCTL")
840 , (0x440C,"TWISSTAT")
841 , (0x4410,"TWISADDR")
842 , (0x4414,"TWIMCTL")
843 , (0x4418,"TWIMSTAT")
844 , (0x441C,"TWIMADDR")
845 , (0x4420,"TWIIRPTL")
846 , (0x4424,"TWIIMASK")
847 , (0x4428,"TWIFIFOCTL")
848 , (0x442C,"TWIFIFOSTAT")
849 , (0x4480,"TXTWI8")
850 , (0x4484,"TXTWI16")
851 , (0x4488,"RXTWI8")
852 , (0x448C,"RXTWI16")
853 ]
854
855
856 data Address24 = Address24 Word32 -- absolute 24 bit address
857 | RelAddress24 Word32 -- relative 24 bit address
858 data Address32 = Address32 Word32 -- absolute 32 bit address
859 | RelAddress32 Word32 -- relative 24 bit address
860
861 -- TODO: only use registerMemoryMap if the address is a DM address
862 instance Show Address24 where
863 show (Address24 w) = findWithDefault (printf "0x%06X" w) w registerMemoryMap
864 show (RelAddress24 w) = printf "(PC,%s)" w' -- two's complement
865 where w' = if w `testBit` 23 then '-' : show (w `xor` 0xFFFFFF) else show w
866
867 -- TODO: only use registerMemoryMap if the address is a DM address
868 instance Show Address32 where
869 show (Address32 w) = findWithDefault (printf "0x%08X" w) w registerMemoryMap
870 show (RelAddress32 w) = printf "(PC,%s)" w' -- two's complement
871 where w' = if w `testBit` 31 then '-' : show (w `xor` 0xFFFFFFFF) else show w
872
873
874 toWord32 :: (Word8, Word8, Word8, Word8) -> Word32
875 toWord32 (a,b,c,d) = fromIntegral a `shift` 24 .|.
876 fromIntegral b `shift` 16 .|.
877 fromIntegral c `shift` 8 .|.
878 fromIntegral d
879
880 data Update = PreModify -- 0, no update
881 | PostModify -- 1, with update
882
883 type PushPops = ([String], [String])
884
885 data Memory = Data -- data memory
886 | Prog -- programme memory
887 deriving Show
888 data AccessType = Read | Write -- memory acces
889 deriving Show
890 data WordAccess = NW | LW -- LW forces a long word access when address is in normal word address
891 deriving Show
892
893 data BranchType = Jump
894 | Call
895 deriving Show
896
897 data ReturnSource = Subroutine
898 | Interrupt
899 deriving Show
900
901 data BitOp = SET
902 | CLR
903 | TGL
904 | TST
905 | XOR
906 deriving Show