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[software/elephly-net.git] / posts / 2013-12-09-wavedrum-connectors.markdown
1 ---
2 title: Connectors on the Wavedrum's circuit board
3 tags: DIY,electronics,music,hacking,wavedrum
4 ---
5
6 On the circuit board of the Wavedrum there are solder holes to
7 accomodate three large connectors. Since they are so easily
8 accessible and thus very inviting to anyone interested in modifying
9 the instrument, I decided to trace each of the pins to its
10 destination.
11
12 The three connectors are named CN10, CN11, and CN12, respectively.
13 CN10 is found on the bottom right, CN11 on the bottom left, and CN12
14 close to the left edge below the micro SD card reader.
15
16 <img class="full stretch" src="/images/posts/2013/wavedrum-connectors.jpg" alt="connectors on the mainboard" />
17
18 # CN10: digital audio interface
19
20 Most of the ten pins of CN10 are outputs. The first three pins carry
21 clock signals used by the analogue to digital and digital to analogue
22 converters on the top-side of the board. Pin four gives access to the
23 PDN (power down) signal which is used to disable the converters. The
24 next three pins are connected over the resistors R85, R84, and R83 to
25 the DSP's pins 145, 144, and 143 (respectively); according to the
26 [DSP's datasheet](http://www.analog.com/static/imported-files/data_sheets/ADSP-21371_21375.pdf)
27 these pins are `DAI_P8` (`SFSI`), `DAI_P10` (`SD2B`), and `DAI_P11`
28 (`SD3A`), and are thus part of the Digital Audio Interface (DAI). The
29 remaining three pins on CN10 expose the supply voltage, ground, and an
30 alternative positive voltage (the same as on the plus pole of the
31 silver capacitors near the right edge of the board). These are the
32 signals left to right:
33
34 . | direction | description
35 ---|-----------|-----------------
36 1 | output | Master clock
37 2 | output | Audio serial clock
38 3 | output | Left/right clock
39 4 | output | `PDN` (power down)
40 5 | input? | `DAI_P8` / `SFSI`
41 6 | input? | `DAI_P10` / `SD2B`
42 7 | input? | `DAI_P11` / `SD3A`
43 8 | output | V_A, or V_DD
44 9 | output | GND
45 10 | output | alternative positive voltage
46
47 What is this all good for? Well, since all these clocks and voltages
48 are exported it becomes relatively easy to connect an external digital
49 to analogue converter (when `DAI_P8`, `DAI_P10`, and `DAI_P11` are
50 used as outputs), or an external analogue to digital converter (if the
51 DSP pins are used as inputs instead). As there are protective
52 resistors between the DSP pins and the connector pins 5--7 I assume
53 that they are supposed to be used as inputs.
54
55
56 # CN11: JTAG interface
57
58 Moving on to the left bottom edge of the board we see a 14-pin
59 connector with the name CN11. This connector gives access to the JTAG
60 interface on the DSP, which allows system debugging. Unfortunately, I
61 don't own a JTAG dongle and the free JTAG debugger
62 [OpenOCD](http://openocd.sourceforge.net) does not support the SHARC
63 core, so I haven't been able to experiment with the debugging
64 interface. I'm not sure whether it is possible to use debugging
65 feature without hardware/software provided by Analog Devices. Using
66 JTAG it should be possible to overwrite the flash memory and replace
67 the firmware. This is the most promising method to upgrade (or
68 downgrade) a Wavedrum.
69
70 The pins on the bottom row are all connected to ground, so the
71 following table only lists the signal names of the upper row of the
72 connector in order from left to right:
73
74
75 . | Signal | Full name
76 --+---------+------------------------
77 1 | `~EMU` | Emulation status
78 2 | `GND` | Ground
79 3 | `TMS` | Test mode select
80 4 | `TCK` | Test clock
81 5 | `~TRST` | Test reset
82 6 | `TDI` | Test data input
83 7 | `TDO` | Test data output
84
85
86
87 # CN12: two-wire serial interface
88
89 CN12 exposes the DSP's two-wire interface, a serial interface
90 compatible with the proprietary I^2C interface. This allows us to
91 connect a number of external serial devices to the serial bus. As
92 firmware support is required to communicate with the devices on the
93 serial bus I don't see how this could be used without a custom
94 firmware.
95
96 The following table lists the signals from top to bottom:
97
98 . | Signal | Full name
99 --+------------+------------------------
100 1 | `V_D` | Positive voltage
101 2 | `TWI_DATA` | Two-wire interface data
102 3 | `TWI_CLK` | Two-wire interface clock
103 4 | `GND` | Ground
104
105
106 # Bonus: boot mode
107
108 What led me to tracing the routes of the connectors was my curiosity
109 about the boot mode. According to the DSP's datasheet, there are four
110 possible boot modes to select from by playing with the states of the
111 pins `BOOT_CFG1-0` (one of these boot modes is "no boot"). Tracing
112 these two pins from the DSP it becomes clear that the third boot mode
113 "EPROM/FLASH boot" is hardwired (`BOOT_CFG1-0 = 10`). The other two
114 usable boot modes are SPI master and slave boots.
115
116 BOOT_CFG1-0 | Booting Mode
117 -------------+--------------------
118 00 | SPI Slave Boot
119 01 | SPI Master Boot
120 10 | EPROM/Flash Boot
121 11 | No boot
122
123 <img class="full stretch" src="/images/posts/2013/wavedrum-bootcfg.jpg" alt="boot configuration traces" />
124
125 As can be seen on the photo, the Wavedrum engineers were kind enough
126 to leave solder pads connected to boot configuration pins on the
127 board, allowing us to rewire them as we see fit. To set `BOOT_CFG0`
128 the pads for `R72` have to be bridged; likewise, to clear `BOOT_CFG1`
129 only the two pads of `R59` have to be bridged.
130
131
132 # References
133
134 - [ADSP-21371/ADSP-21375 datasheet](http://www.analog.com/static/imported-files/data_sheets/ADSP-21371_21375.pdf)
135 - [ADSP hardware reference](http://www.analog.com/static/imported-files/processor_manuals/ADSP-21367_hwr_rev2-1.pdf)