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authorrekado <rekado@elephly.net>2014-09-19 09:22:37 +0200
committerrekado <rekado@elephly.net>2014-09-19 09:22:37 +0200
commit79eb0890140cf212245195b2b4c6768cdedbd372 (patch)
tree1c45528d4dbbf54d5b51bdb29eae7fd440da8d18
parent80a146481150bd7e51df3cfcd8d03ebdb6ebf986 (diff)
print register names
-rw-r--r--SHARC/Types.hs85
1 files changed, 80 insertions, 5 deletions
diff --git a/SHARC/Types.hs b/SHARC/Types.hs
index d6c9eac..22f91a1 100644
--- a/SHARC/Types.hs
+++ b/SHARC/Types.hs
@@ -93,13 +93,16 @@ instance Show Cond where
instance Show TermCond where
show (TermCond n) = findWithDefault (printf "0x%02X" n) n termCodeMap
+-- TODO: see page 10-30 in programming reference for register opcodes
+-- TODO: Ireg is just a special case Ureg. Unify types!
data Ireg = Ireg Word8
mkIreg :: Word8 -> Ireg
mkIreg n = Ireg $ n .&. 0x07
instance Show Ireg where
show (Ireg n) = printf "I%d" n
+-- TODO: Mreg is just a special case Ureg. Unify types!
data Mreg = Mreg Word8
mkMreg :: Word8 -> Mreg
mkMreg n = Mreg $ n .&. 0x07
@@ -112,21 +115,93 @@ data Ureg = Ureg Word8
mkUreg :: Word8 -> Ureg
mkUreg n = Ureg $ n .&. 0xEF
instance Show Ureg where
- show (Ureg n) = printf "0x%02X" n
-
+ show (Ureg n) = case prefix of
+ 0x00 -> format0000 stripped
+ 0x10 -> format0001 stripped
+ 0x20 -> format0010 stripped
+ 0x30 -> format0011 stripped
+ 0x40 -> format0100 stripped
+ 0x50 -> format0101 stripped
+ 0x60 -> names0110 !! fromIntegral stripped
+ _ -> printf "0x%02X" n
+ where
+ prefix = n .&. 0xF0
+ stripped = n .&. 0x0F
+ format0000 x = 'R' : show x -- TODO: depends on whether it's DREG or CDREG
+ format0001 x = 'I' : show x
+ format0010 x = 'M' : show x
+ format0011 x = 'L' : show x
+ format0100 x = 'B' : show x
+ format0101 x = 'S' : show x -- TODO: depends on whether it's DREG or CDREG
+ names0110 = [ "FADDR" -- these are names for registers with prefix 0110
+ , "DADDR"
+ , ""
+ , "PC"
+ , "PCSTK"
+ , "PCSTKP"
+ , "LADDR"
+ , "CURLCNTR"
+ , "LCNTR"
+ , "EMUCLK"
+ , "EMUCLK2"
+ , "PX"
+ , "PX1"
+ , "PX2"
+ , "TPERIOD"
+ , "TCOUNT"
+ ]
+
+-- TODO: Sreg is just a special case Ureg. Unify types!
-- 4 bit system register
data Sreg = Sreg Word8
mkSreg :: Word8 -> Sreg
mkSreg n = Sreg $ n .&. 0x0F
instance Show Sreg where
- show (Sreg n) = printf "0x%01X" n
-
+ show (Sreg n) = xnames !! fromIntegral n -- TODO: distinguish between PEx and PEy names!
+ where xnames = [ "USTAT1"
+ , "USTAT2"
+ , "MODE1"
+ , "MMASK"
+ , "MODE2"
+ , "FLAGS"
+ , "ASTATx"
+ , "ASTATy"
+ , "STKYx"
+ , "STKYy"
+ , "IRPTL"
+ , "IMASK"
+ , "IMASKP"
+ , "LRPTL"
+ , "USTAT3"
+ , "USTAT4"
+ ]
+ ynames = [ "USTAT2"
+ , "USTAT1"
+ , "MODE1"
+ , "MMASK"
+ , "MODE2"
+ , "FLAGS"
+ , "ASTATy"
+ , "ASTATx"
+ , "STKYy"
+ , "STKYx"
+ , "IRPTL"
+ , "IMASK"
+ , "IMASKP"
+ , "LRPTL"
+ , "USTAT4"
+ , "USTAT3"
+ ]
+
+-- TODO: Dreg is just a special case Ureg. Unify types!
-- 4 bit data register
data Dreg = Dreg Word8
mkDreg :: Word8 -> Dreg
mkDreg n = Dreg $ n .&. 0x0F
instance Show Dreg where
- show (Dreg n) = printf "R%d" n -- TODO: according to the docs this is R15-R0 *and* F15-F0
+ show (Dreg n) = printf "R%d" n
+ -- TODO: according to the docs this is R15-R0 *and* F15-F0
+ -- TODO: if this is a CDREG, it should be S, not R
data Address24 = Address24 Word32 -- absolute 24 bit address
| RelAddress24 Word32 -- relative 24 bit address